Patents by Inventor DEVRAJ RAJAGOPAL

DEVRAJ RAJAGOPAL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200145002
    Abstract: A wide-voltage range, failsafe output interface module including a low-voltage, drain extended MOSFETs has been proposed to prevent the flow of reverse current during a failsafe operation while ensuring the MOSFETs are not subject to voltage over their voltage tolerance levels, improving reliability of an output interface module without resorting to more costly transistors with thicker films.
    Type: Application
    Filed: July 3, 2019
    Publication date: May 7, 2020
    Inventors: Srikanth SRINIVASAN, Devraj RAJAGOPAL
  • Publication number: 20150294977
    Abstract: A nonvolatile memory device includes a memory cell array including a plurality of cell strings each having a plurality of memory cells stacked in a direction perpendicular to a substrate, and a peripheral circuit region including a plurality of transistors electrically connected to the memory cell array through a plurality of conductive lines. Each of the transistors includes a gate electrode crossing an active region of the substrate in a first direction and source and drain regions in the active region at the opposite sides of the gate electrode. In at least one of the transistors, the number of source contact plugs connected to the source region is different from the number of drain contact plugs connected to the drain region.
    Type: Application
    Filed: December 9, 2014
    Publication date: October 15, 2015
    Inventors: SANG-LOK KIM, YOUNGJIN JEON, DEVRAJ RAJAGOPAL, DONG-SU JANG, YONGHO CHO