Patents by Inventor Dewei Xu

Dewei Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11945067
    Abstract: An automobile hub fixture includes a fixture body and a positioning apparatus. The fixture body includes a fixed platform and a plurality of clamping claws arranged at intervals in a circumferential direction of the fixed platform. The clamping claws are configured to clamp an outer rim of a hub. The plurality of clamping claws are connected to a driving member by using a linkage, and the driving member drives the clamping claws to radially move along the fixed platform. The positioning apparatus includes a movable platform slidably connected to the clamping claws. A positioning module configured to position an inner rim or the outer rim of the hub is mounted to the movable platform. The machining device includes a fixture, a machine tool, and a minimal quantity lubrication apparatus. The production line includes a machining device, a loading system, a loading and unloading manipulator, and a catching table.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: April 2, 2024
    Assignees: QINGDAO UNIVERSITY OF TECHNOLOGY, HANERGY (QINGDAO) LUBRICATION TECHNOLOGY CO., LTD.
    Inventors: Changhe Li, Minkai Chen, Zongming Zhou, Naiqing Zhang, Shuaiqiang Xu, Dewei Liu, Bingheng Lu, Yanbin Zhang, Xiaoming Wang, Min Yang, Bo Liu, Xin Cui, Mingzheng Liu, Xifeng Wu
  • Patent number: 11699650
    Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure. With capacitor electrodes in different ILD layers. The structure includes a first inter-level dielectric (ILD) layer having a top surface, a first vertical electrode within the first ILD layer, a capacitor dielectric film on a top surface of the first vertical electrode, a second ILD layer over the first ILD layer, and a second vertical electrode within the second ILD layer and on the capacitor dielectric film. The capacitor dielectric film is vertically between the first vertical electrode and the second vertical electrode.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: July 11, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Alamgir M. Arif, Sunil K. Singh, Dewei Xu, Seung-Yeop Kook, Roderick A. Augur
  • Patent number: 11693048
    Abstract: Embodiments of the disclosure provide a crack detecting and monitoring system, including: a plurality of electrically conductive structures extending about a protective barrier formed in an inactive region of an integrated circuit (IC), wherein an active region of the IC is enclosed within the protective barrier; and a plurality of stages of sensing circuits connected in series for sensing a change in an electrical characteristic of each of the plurality of structures and for receiving an enable signal, wherein each sensing circuit is coupled to a respective structure of the plurality of structures, the change in the electrical characteristic indicating damage to the respective structure, wherein each sensing circuit includes a circuit for selectively generating the enable signal for a next sensing circuit in the plurality of stages of sensing circuits.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: July 4, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Nicholas A. Polomoff, Dewei Xu, Eric D. Hunt-Schroeder
  • Patent number: 11637492
    Abstract: A power supply circuit includes at least two input terminals that receive an input voltage, a transformer including a primary side electrically connected to the input voltage, a rectifier electrically connected to a secondary side of the transformer, and a boost switch electrically connected in parallel with the rectifier and a pair of output voltage terminals that include a first output voltage terminal and a second output voltage terminal. The input voltage is electrically connected to an AC source, and each of the at least two input terminals receives a different phase of the AC source.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: April 25, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Jahangir Afsharian, Dewei Xu, Bing Gong
  • Patent number: 11463014
    Abstract: A power supply circuit includes a matrix converter that converts a first to third input alternating current (AC) phases into a single primary phase, a transformer including a primary side electrically connected to the single primary phase, a rectifier electrically connected to a secondary side of the transformer, and an output voltage terminal electrically connected to the rectifier. The matrix converter includes first through sixth bi-directional switch pairs, and each of the first through sixth bi-directional switch pairs includes first and second uni-directional switches. When the third input AC phase is disconnected or short circuited, the second and the fifth bi-directional switch pairs are turned off, and, in each of the first, third, fourth, and sixth bi-directional switch pairs, one of the first and second uni-directional switches are turned on and the other of the second and first uni-directional switches are operated as a full-bridge phase-shifted converter.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: October 4, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Jahangir Afsharian, Bing Gong, Dewei Xu
  • Publication number: 20220230955
    Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure. With capacitor electrodes in different ILD layers. The structure includes a first inter-level dielectric (ILD) layer having a top surface, a first vertical electrode within the first ILD layer, a capacitor dielectric film on a top surface of the first vertical electrode, a second ILD layer over the first ILD layer, and a second vertical electrode within the second ILD layer and on the capacitor dielectric film. The capacitor dielectric film is vertically between the first vertical electrode and the second vertical electrode.
    Type: Application
    Filed: January 18, 2021
    Publication date: July 21, 2022
    Inventors: Alamgir M. Arif, Sunil K. Singh, Dewei Xu, Seung-Yeop Kook, Roderick A. Augur
  • Patent number: 11348867
    Abstract: Embodiments of the disclosure provide a capacitor for an integrated circuit (IC). The capacitor may include a first vertical electrode on an upper surface of a first conductor within a first wiring layer. A capacitor dielectric may be on an upper surface of the first vertical electrode. A second vertical electrode may be on an upper surface of the capacitor dielectric. The second vertical electrode is vertically between the capacitor dielectric and a second conductor. An inter-level dielectric (ILD) layer is adjacent to each of the first vertical electrode, the capacitor dielectric, and the second vertical electrode. The ILD layer is vertically between the first conductor and the second conductor.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: May 31, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Dewei Xu, Sunil K. Singh, Seung-Yeop Kook, Roderick A. Augur
  • Publication number: 20220139819
    Abstract: Embodiments of the disclosure provide a capacitor for an integrated circuit (IC). The capacitor may include a first vertical electrode on an upper surface of a first conductor within a first wiring layer. A capacitor dielectric may be on an upper surface of the first vertical electrode. A second vertical electrode may be on an upper surface of the capacitor dielectric. The second vertical electrode is vertically between the capacitor dielectric and a second conductor. An inter-level dielectric (ILD) layer is adjacent to each of the first vertical electrode, the capacitor dielectric, and the second vertical electrode. The ILD layer is vertically between the first conductor and the second conductor.
    Type: Application
    Filed: November 5, 2020
    Publication date: May 5, 2022
    Inventors: Dewei Xu, Sunil K. Singh, Seung-Yeop Kook, Roderick A. Augur
  • Publication number: 20220057445
    Abstract: Embodiments of the disclosure provide a crack detecting and monitoring system, including: a plurality of electrically conductive structures extending about a protective barrier formed in an inactive region of an integrated circuit (IC), wherein an active region of the IC is enclosed within the protective barrier; and a plurality of stages of sensing circuits connected in series for sensing a change in an electrical characteristic of each of the plurality of structures and for receiving an enable signal, wherein each sensing circuit is coupled to a respective structure of the plurality of structures, the change in the electrical characteristic indicating damage to the respective structure, wherein each sensing circuit includes a circuit for selectively generating the enable signal for a next sensing circuit in the plurality of stages of sensing circuits.
    Type: Application
    Filed: November 5, 2021
    Publication date: February 24, 2022
    Inventors: Nicholas A. Polomoff, Dewei Xu, Eric D. Hunt-Schroeder
  • Patent number: 11215661
    Abstract: Embodiments of the disclosure provide a crack detecting and monitoring system, including: a plurality of electrically conductive structures extending about a protective barrier formed in an inactive region of an integrated circuit (IC), wherein an active region of the IC is enclosed within the protective barrier; and a plurality of stages of sensing circuits connected in series for sensing a change in an electrical characteristic of each of the plurality of structures and for receiving an enable signal, wherein each sensing circuit is coupled to a respective structure of the plurality of structures, the change in the electrical characteristic indicating damage to the respective structure, wherein each sensing circuit includes a circuit for selectively generating the enable signal for a next sensing circuit in the plurality of stages of sensing circuits.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: January 4, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Nicholas A. Polomoff, Dewei Xu, Eric D. Hunt-Schroeder
  • Publication number: 20210356514
    Abstract: Embodiments of the disclosure provide a crack detecting and monitoring system, including: a plurality of electrically conductive structures extending about a protective barrier formed in an inactive region of an integrated circuit (IC), wherein an active region of the IC is enclosed within the protective barrier; and a plurality of stages of sensing circuits connected in series for sensing a change in an electrical characteristic of each of the plurality of structures and for receiving an enable signal, wherein each sensing circuit is coupled to a respective structure of the plurality of structures, the change in the electrical characteristic indicating damage to the respective structure, wherein each sensing circuit incudes a circuit for selectively generating the enable signal for a next sensing circuit in the plurality of stages of sensing circuits.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 18, 2021
    Inventors: Nicholas A. Polomoff, Dewei Xu, Eric D. Hunt-Schroeder
  • Patent number: 11105846
    Abstract: Embodiments of the disclosure provide a system for detecting and monitoring a crack in an integrated circuit (IC), including: at least one electrically conductive perimeter line (PLINE) extending about, and electrically isolated from, a protective structure formed in an inactive region of the IC, wherein an active region of the IC is enclosed within the protective structure; a circuit for sensing a change in an electrical characteristic of the at least one PLINE, the change in the electrical characteristic indicating a presence of a crack in the inactive region of the IC; and a connecting structure for electrically coupling each PLINE to the sensing circuit.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: August 31, 2021
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Nicholas A. Polomoff, Dirk Breuer, Eric D. Hunt-Schroeder, Bernhard J Wunder, Dewei Xu
  • Patent number: 11107880
    Abstract: Embodiments of the disclosure provide a capacitor structure for an integrated circuit (IC), and methods to form the capacitor structure. The capacitor structure may include: a first ring electrode in an inter-level dielectric (ILD) layer on a substrate; an inner electrode positioned within the first ring electrode; and a capacitor dielectric separating the first ring electrode and the inner electrode, and separating a bottom surface of the inner electrode from the ILD layer.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: August 31, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Dewei Xu, Sunil K. Singh, Siva R. Dangeti, Seung-Yeop Kook
  • Publication number: 20210111637
    Abstract: A power supply circuit includes a matrix converter that converts a first to third input alternating current (AC) phases into a single primary phase, a transformer including a primary side electrically connected to the single primary phase, a rectifier electrically connected to a secondary side of the transformer, and an output voltage terminal electrically connected to the rectifier. The matrix converter includes first through sixth bi-directional switch pairs, and each of the first through sixth bi-directional switch pairs includes first and second uni-directional switches. When the third input AC phase is disconnected or short circuited, the second and the fifth bi-directional switch pairs are turned off, and, in each of the first, third, fourth, and sixth bi-directional switch pairs, one of the first and second uni-directional switches are turned on and the other of the second and first uni-directional switches are operated as a full-bridge phase-shifted converter.
    Type: Application
    Filed: March 29, 2018
    Publication date: April 15, 2021
    Inventor: Dewei XU
  • Publication number: 20210067053
    Abstract: A power supply circuit includes at least two input terminals that receive an input voltage, a transformer including a primary side electrically connected to the input voltage, a rectifier electrically connected to a secondary side of the transformer, and a boost switch electrically connected in parallel with the rectifier and a pair of output voltage terminals that include a first output voltage terminal and a second output voltage terminal. The input voltage is electrically connected to an AC source, and each of the at least two input terminals receives a different phase of the AC source.
    Type: Application
    Filed: April 30, 2019
    Publication date: March 4, 2021
    Inventors: Jahangir AFSHARIAN, Bing GONG, Dewei XU
  • Publication number: 20200357880
    Abstract: Embodiments of the disclosure provide a capacitor structure for an integrated circuit (IC), and methods to form the capacitor structure. The capacitor structure may include: a first ring electrode in an inter-level dielectric (ILD) layer on a substrate; an inner electrode positioned within the first ring electrode; and a capacitor dielectric separating the first ring electrode and the inner electrode, and separating a bottom surface of the inner electrode from the ILD layer.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 12, 2020
    Inventors: Dewei Xu, Sunil K. Singh, Siva R. Dangeti, Seung-Yeop Kook
  • Publication number: 20200035495
    Abstract: Apparatus and methods of chemical-mechanical polishing of a layer on a wafer. A plurality of polishers arranged on a rotating plate, and a carrier is configured to hold the wafer and to place the layer in contact with the polishers. Each polisher includes a platen and a force-applying device operatively connected to the platen, and the force-applying device is configured to apply a variable force to the platen in order to change a rate of material removal over an area of the layer on the wafer contacted by a polishing pad carried by the platen.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 30, 2020
    Inventors: Dewei Xu, Lili Cheng, Shinichiro Kakita, Ushasree Katakamsetty, Roderick A. Augur
  • Patent number: 10454359
    Abstract: A method of commutation in a matrix rectifier from an active vector to a zero vector includes two steps. A method of commutation in a matrix rectifier from a zero vector to an active vector includes three steps.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: October 22, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tao Zhao, Dewei Xu, Jahangir Afsharian, Bing Gong, Zhihua Yang
  • Publication number: 20190109531
    Abstract: A method of commutation in a matrix rectifier from an active vector to a zero vector includes two steps. A method of commutation in a matrix rectifier from a zero vector to an active vector includes three steps.
    Type: Application
    Filed: December 5, 2018
    Publication date: April 11, 2019
    Inventors: Tao Zhao, Dewei Xu, Jahangir Afsharian, Bing Gong, Zhihua Yang
  • Patent number: 10199927
    Abstract: A matrix rectifier includes a bridge x defined by phases A and B and a bridge y defined by phases A and C, in which each input phases A, B, and C includes two bi-directional switches connected in series. A method of operating the matrix rectifier includes operating the bridges x and y as independent full-bridge phase-shifted converters in each 60° interval between two successive zero-voltage crossings of the input phases A, B, and C. In a first 30° sector of each 60° interval, the bridges x and y are operated in a first vector sequence in every switching period, and the first vector sequence is divided into a sequence of x+, y+, 0, x?, y?, 0.
    Type: Grant
    Filed: September 17, 2016
    Date of Patent: February 5, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Jahangir Afsharian, Dewei Xu, Bing Gong, Zhihua Yang