Patents by Inventor Dexin Liang
Dexin Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230198211Abstract: A power adaption device includes an electrical cord assembly and an adaptor plug assembly. The adaptor plug assembly includes an electrical conduction member and a tightness adjustment member. The electrical conduction member is formed with an insertion hole and an adjustment hole in communication with each other. The electrical cord assembly is insertable into the insertion hole to electrically connect the electrical cord assembly with the electrical conduction member. The tightness adjustment member is screwed into and connected to the adjustment hole to abut the electrical cord assembly. As such, firmness of connection between the electrical cord assembly and the adaptor plug assembly can be enhanced.Type: ApplicationFiled: December 14, 2022Publication date: June 22, 2023Applicants: Huizhou Zhongbang Electronics Co., Ltd., Huizhou Zhongbang Power Co., Ltd.Inventors: Dexin LIANG, Qiping XIANG, Hui LI, Jiazhi MO, Jiantong RUAN
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Patent number: 11469547Abstract: Described herein is a rotary coupling structure which comprises a fixing base and a rotary coupling plug; and the fixing base comprises a mounting member and a rotating member; the mounting member comprises a sleeve provided on the inner wall with a lock slot, a limit buckle disposed at the end of the sleeve, and a side boss disposed on the side wall of the sleeve; the rotary coupling plug, configured to be inserted into the sleeve and connected with a connector, is provided with a rotary lock blade rotatively disposed in the lock slot.Type: GrantFiled: January 14, 2020Date of Patent: October 11, 2022Assignee: HUIZHOU ZHONGBANG ELECTRONICS CO., LTDInventors: Dexin Liang, Qiping Xiang
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Publication number: 20210098935Abstract: The present invention discloses a rotary coupling structure, a power supply device and a sofa, which comprise a fixing base and a rotary coupling plug; the fixing base comprises a mounting member and a rotating member; the mounting member comprises a sleeve provided on the inner wall with a lock slot, a limit buckle disposed at the end of the sleeve, and a side boss disposed on the side wall of the sleeve; the rotary coupling plug, configured to be inserted into the sleeve and connected with a connector, is provided with a rotary lock blade rotatively disposed in the lock slot.Type: ApplicationFiled: January 14, 2020Publication date: April 1, 2021Applicant: Huizhou Zhongbang Electronics Co., LtdInventors: Dexin LIANG, Qiping XIANG
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Publication number: 20200106064Abstract: The present invention discloses a combined power supply, including a lithium battery and a base which are detachably connected. A power-switching circuit is provided in the base. The base further comprises a stand-by battery which is detachably connected to the base.Type: ApplicationFiled: July 12, 2019Publication date: April 2, 2020Inventors: Dexin LIANG, Qiping XIANG
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Patent number: 10236715Abstract: The present invention provides a switch power circuit with a backup battery for power supply, comprising an input rectifier module, an PWM switch control module, a transformer module, an output rectifier diode, a negative feedback module, a backup battery, an isolation diode unit and a zener diode; the anode of the output rectifier diode is connected with the positive output end of the transformer unit, the cathode of the output rectifier diode is connected with the cathode of the isolation diode unit, the anode of the isolation diode unit is connected with the anode of the backup battery, the cathode of the backup battery is connected with the negative output end of the transformer module; the cathode of the zener diode is connected between the cathode of the isolation diode unit and the cathode of the output rectifier diode; one end of the negative feedback module is connected with the anode of the zener diode, and the other end of the negative feedback module is connected with the control port of the PWM sType: GrantFiled: August 5, 2016Date of Patent: March 19, 2019Inventor: Dexin Liang
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Publication number: 20170085123Abstract: The present invention provides a switch power circuit with a backup battery for power supply, comprising an input rectifier module, an PWM switch control module, a transformer module, an output rectifier diode, a negative feedback module, a backup battery, an isolation diode unit and a zener diode; the anode of the output rectifier diode is connected with the positive output end of the transformer unit, the cathode of the output rectifier diode is connected with the cathode of the isolation diode unit, the anode of the isolation diode unit is connected with the anode of the backup battery, the cathode of the backup battery is connected with the negative output end of the transformer module; the cathode of the zener diode is connected between the cathode of the isolation diode unit and the cathode of the output rectifier diode; one end of the negative feedback module is connected with the anode of the zener diode, and the other end of the negative feedback module is connected with the control port of the PWM sType: ApplicationFiled: August 5, 2016Publication date: March 23, 2017Inventor: Dexin Liang
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Patent number: 6630737Abstract: The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump.Type: GrantFiled: September 24, 1999Date of Patent: October 7, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Lily Zhao, Dexin Liang
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Publication number: 20010015497Abstract: The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump.Type: ApplicationFiled: September 24, 1999Publication date: August 23, 2001Inventors: LILY ZHAO, DEXIN LIANG
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Patent number: 6222260Abstract: A flat, thin decoupling capacitor is disposed inside an integrated circuit device in a coplanar relationship with a semiconductor chip and a bonding element. When connected to the power and ground plane of a device substrate or in a leadframe device, the decoupling capacitor is positioned close to the semiconductor chip to substantially reduce ground bounce and crosstalk from the semiconductor chip. When the decoupling capacitor is positioned to locate the semiconductor chip between itself and the device substrate or leadframe device, the decoupling capacitor shields electromagnetic interference from the semiconductor chip.Type: GrantFiled: May 7, 1998Date of Patent: April 24, 2001Assignee: VLSI Technology, Inc.Inventors: Dexin Liang, Ray Killorn
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Patent number: 6207476Abstract: The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump.Type: GrantFiled: June 10, 1999Date of Patent: March 27, 2001Assignee: VLSI Technology, Inc.Inventors: Lily Zhao, Dexin Liang
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Patent number: 5972734Abstract: A ball grid array package (BGA) according to the present invention has an interposer between a bond pad on the lower surface of the substrate and the solder ball. The interposer has a conductive portion in contact with the bond pad surrounded by a nonconductive or insulating portion. The conductive portion in contact with the bond pad is sufficiently constrained from widening during a subsequent reflow process by the presence of the nonconductive or insulating portion. The contact with the bond pad is sufficiently small to allow traces to pass near the bond pad substantially directly en route to another bond pad. The nonconductive portion also prevents subsequently-applied encapsulant from coming in contact with and contaminating the bond pad. The elevated surface of the interposer, i.e. the surface of the interposer furthest from the bond pad, supports the solder ball, and is sufficiently wide to support the solder ball without allowing the solder ball to come in contact with the traces.Type: GrantFiled: September 17, 1997Date of Patent: October 26, 1999Assignee: LSI Logic CorporationInventors: Karla Y. Carichner, Dexin Liang
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Patent number: 5688606Abstract: There is provided an anodizable aluminum substrate having an increased breakdown voltage. The increase in breakdown voltage is achieved by selecting an appropriate aluminum alloy and appropriate processing parameters. Sealing the anodic film increases the breakdown voltage by decreasing corrosion. A preferred sealant is an epoxy cresol novolac having a low room temperature viscosity that cures to a highly cross-linked polymer.Type: GrantFiled: April 18, 1996Date of Patent: November 18, 1997Assignee: Olin CorporationInventors: Deepak Mahulikar, Efraim Sagiv, Arvind Parthasarathi, Satish Jalota, Andrew J. Brock, Michael A. Holmes, Jeffrey M. Schlater, German J. Ramirez, Dexin Liang
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Patent number: 5639696Abstract: An integrated circuit is mounted on and interconnected with a circuit board by an array of electrically conductive columns. The assembly is fabricated by initially interconnecting the integrated circuit and the circuit board with an array of reflowable electrically conductive solder balls that correspond to the columns respectively. The circuit board is held with the integrated circuit extending downwardly therefrom. Sufficient heat is applied to cause the solder balls to reflow. The integrated circuit is pulled downwardly away from the circuit board by gravity such that the balls are stretched to form the columns, and the assembly is allowed to cool such that the columns solidify. A fixture may be provided against which the integrated circuit abuts after it has moved away from the circuit board by a predetermined distance such that the columns have a precisely determined height.Type: GrantFiled: January 31, 1996Date of Patent: June 17, 1997Assignee: LSI Logic CorporationInventors: Dexin Liang, Mark R. Schneider
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Patent number: 5534356Abstract: There is provided an anodizable aluminum substrate having an increased breakdown voltage. The increase in breakdown voltage is achieved by selecting an appropriate aluminum alloy and appropriate processing parameters. Sealing the anodic film increases the breakdown voltage by decreasing corrosion. A preferred sealant is an epoxy cresol novolac having a low room temperature viscosity that cures to a highly cross-linked polymer.Type: GrantFiled: April 26, 1995Date of Patent: July 9, 1996Assignee: Olin CorporationInventors: Deepak Mahulikar, Efraim Sagiv, Arvind Parthasarathi, Satish Jalota, Andrew J. Brock, Michael A. Holmes, Jeffrey M. Schlater, German J. Ramirez, Dexin Liang
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Patent number: 5455386Abstract: There is disclosed an adhesively sealed electronic package in which a compensation apparatus is provided for excess adhesive. As a result, excess adhesive does not extend beyond the package perimeter, squeeze-out, or travel along the inner lead fingers interfering with wire bonding. The compensation is a chamfer on the peripheral edges and/or interior edges of the package base component and cover component.Type: GrantFiled: January 14, 1994Date of Patent: October 3, 1995Assignee: Olin CorporationInventors: George A. Brathwaite, German J. Ramirez, Michael A. Holmes, Paul R. Hoffman, Dexin Liang
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Patent number: 5360942Abstract: There is provided a module for supporting a plurality of semiconductor devices within an electronic package. The module has a support substrate and an apertured substrate laminated together with a polymer adhesive. A plurality of semiconductor devices are disposed within apertures formed in the apertured substrate and bonded to the support substrate by that same polymer adhesive.Type: GrantFiled: November 16, 1993Date of Patent: November 1, 1994Assignee: Olin CorporationInventors: Paul R. Hoffman, Dexin Liang
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Patent number: RE42332Abstract: The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump.Type: GrantFiled: December 3, 2009Date of Patent: May 10, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lily Zhao, Dexin Liang
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Patent number: RE42457Abstract: The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an integrated circuit package including a substrate including a first surface, a second surface and a plurality of conductors, the first surface includes a plurality of conductive pads adapted to couple with a plurality of corresponding bond pads of a semiconductor die, and the conductors being configured to couple the conductive pads with the second surface; and a plurality of conductive bumps coupled with the second surface of the substrate and electrically coupled with respective conductors, the conductive bumps being formed in an array including a plurality of power bumps and signal bumps, and the signal bumps being individually positioned immediately adjacent at least one power bump.Type: GrantFiled: December 2, 2009Date of Patent: June 14, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lily Zhao, Dexin Liang
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Patent number: D895548Type: GrantFiled: June 21, 2019Date of Patent: September 8, 2020Assignee: Huizhou Zhongbang Electric Co., Ltd.Inventors: Dexin Liang, Qiping Xiang
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Patent number: D904300Type: GrantFiled: April 25, 2019Date of Patent: December 8, 2020Assignee: Huizhou Zhongbang Electric Co., Ltd.Inventors: Dexin Liang, Qiping Xiang