Patents by Inventor Dexter Xueming Tan

Dexter Xueming Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Device with isolation buffer
    Patent number: 9214557
    Abstract: Devices and methods for forming a device are presented. A substrate prepared with a device region is provided. A fin is formed in the device region. The fin includes top and bottom portions. An amorphous isolation buffer is formed at least in the bottom fin portion, leaving the top fin portion crystalline. The top fin portion serves as a body of a fin type transistor.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: December 15, 2015
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Dexter Xueming Tan, Eng Huat Toh
  • DEVICE WITH ISOLATION BUFFER
    Publication number: 20150221761
    Abstract: Devices and methods for forming a device are presented. A substrate prepared with a device region is provided. A fin is formed in the device region. The fin includes top and bottom portions. An amorphous isolation buffer is formed at least in the bottom fin portion, leaving the top fin portion crystalline. The top fin portion serves as a body of a fin type transistor.
    Type: Application
    Filed: February 6, 2014
    Publication date: August 6, 2015
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Dexter Xueming TAN, Eng Huat TOH
  • Low OHMIC contacts
    Patent number: 8922003
    Abstract: A method for forming a device is disclosed. A substrate with a contact region is provided. Vacancy defects are formed in the substrate. The vacancy defects have a peak concentration at a depth DV. A metal based contact is formed in the contact region. The metal based contact has a depth DC which is equal to about DV. The vacancy defects lower the resistance of the metal based contact with the substrate.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: December 30, 2014
    Assignees: GLOBALFOUNDRIES Singapore Pte. Ltd., Nanyang Technological University
    Inventors: Dexter Xueming Tan, Yoke King Chin, Kin Leong Pey
  • LOW OHMIC CONTACTS
    Publication number: 20130187264
    Abstract: A method for forming a device is disclosed. A substrate with a contact region is provided. Vacancy defects are formed in the substrate. The vacancy defects have a peak concentration at a depth DV. A metal based contact is formed in the contact region. The metal based contact has a depth DC which is equal to about DV. The vacancy defects lower the resistance of the metal based contact with the substrate.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 25, 2013
    Applicants: NANYANG TECHNOLOGICAL UNIVERSITY, GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Dexter Xueming TAN, Yoke King CHIN, Kin Leong PEY
  • Method for fabricating semiconductor devices with shallow diffusion regions
    Patent number: 8101487
    Abstract: A method for fabricating a semiconductor device is presented. The method includes providing a substrate and forming a gate stack over the substrate. A first laser processing to form vacancy rich regions within the substrate on opposing sides of the gate stack is performed. The vacancy rich regions have a first depth from a surface of the substrate. A first implant causing end of range defect regions to be formed on opposing sides of the gate stack at a second depth from the surface of the substrate is also carried out, wherein the first depth is proximate to the second depth.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: January 24, 2012
    Assignees: Nanyang Technological University, National University of Singapore, GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Dexter Xueming Tan, Benjamin Colombeau, Clark Kuang Kian Ong, Sai Hooi Yeong, Chee Mang Ng, Kin Leong Pey
  • METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH SHALLOW DIFFUSION REGIONS
    Publication number: 20090286373
    Abstract: A method for fabricating a semiconductor device is presented. The method includes providing a substrate and forming a gate stack over the substrate. A first laser processing to form vacancy rich regions within the substrate on opposing sides of the gate stack is performed. The vacancy rich regions have a first depth from a surface of the substrate. A first implant causing end of range defect regions to be formed on opposing sides of the gate stack at a second depth from the surface of the substrate is also carried out, wherein the first depth is proximate to the second depth.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 19, 2009
    Applicants: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD., NANYANG TECHNOLOGICAL UNIVERSITY, NATIONAL UNIVERSITY OF SINGAPORE
    Inventors: Dexter Xueming TAN, Benjamin COLOMBEAU, Clark Kuang Kian ONG, Sai Hooi YEONG, Chee Mang NG, Kin Leong PEY