Abstract: Charge leakage/injection suppression circuitry within a capacitive programmable gain amplifier provides a low-impedance expulsion path for residual carriers within a feedback-path amplifier-mode switch and equalizes a voltage across a critical-leakage-path component of that amplifier-mode switch, reducing charge injection and leakage into an otherwise isolated amplifier input node to yield a low-noise amplifier output.

Abstract: A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.

Abstract: An image capturing device may include a ramp generator circuit that may be used in performance of analog-to-digital conversion of image signals from pixels of an image sensor. The ramp generator circuit may generate a voltage having one or more rising and/or falling portions, using a reference voltage and an integration current. The ramp generator circuit may include a first sample-and-hold switch and/or a second sample-and-hold switch. The ramp generator circuit may selectively turn off the first and/or the second sample-and-hold switches to hold the reference voltage and/or a bias voltage that is used for generating the integration current during analog-to-digital conversion of the image signals. As a result, reference voltage, bias voltage, and/or integration current may be held and substantially stabilized during the analog-to-digital conversion.

Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.

Abstract: Charge leakage/injection suppression circuitry within a capacitive programmable gain amplifier provides a low-impedance expulsion path for residual carriers within a feedback-path amplifier-mode switch and equalizes a voltage across a critical-leakage-path component of that amplifier-mode switch, reducing charge injection and leakage into an otherwise isolated amplifier input node to yield a low-noise amplifier output.

Abstract: Charge leakage/injection suppression circuitry within a capacitive programmable gain amplifier provides a low-impedance expulsion path for residual carriers within a feedback-path amplifier-mode switch and equalizes a voltage across a critical-leakage-path component of that amplifier-mode switch, reducing charge injection and leakage into an otherwise isolated amplifier input node to yield a low-noise amplifier output.

Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.

Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.

Abstract: Multi-stage auto-zeroing signal amplifiers are deployed within event-shuttering pixels of a quanta image sensor (QIS) pixel array to enable reliable per-pixel reporting of photonic events, down to resolution of a single photon strike, for each of a continuous sequence of sub-microsecond event-detection intervals.

Abstract: A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.

Abstract: Conventional SRAM sense-amplifiers are replaced by small-footprint keeper circuits that enable single-ended SRAM readout without bitline precharge, simplifying and relaxing the timing of SRAM cell access and bitline sampling operations and thus enabling potentially faster readout operation and/or lower bit error rate.

Abstract: An image capturing device may include a ramp generator circuit that may be used in performance of analog-to-digital conversion of image signals from pixels of an image sensor. The ramp generator circuit may generate a voltage having one or more rising and/or falling portions, using a reference voltage and an integration current. The ramp generator circuit may include a first sample-and-hold switch and/or a second sample-and-hold switch. The ramp generator circuit may selectively turn off the first and/or the second sample-and-hold switches to hold the reference voltage and/or a bias voltage that is used for generating the integration current during analog-to-digital conversion of the image signals. As a result, reference voltage, bias voltage, and/or integration current may be held and substantially stabilized during the analog-to-digital conversion.

Abstract: A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.

Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.

Abstract: Multi-stage auto-zeroing signal amplifiers are deployed within event-shuttering pixels of a quanta image sensor (QIS) pixel array to enable reliable per-pixel reporting of photonic events, down to resolution of a single photon strike, for each of a continuous sequence of sub-microsecond event-detection intervals.

Abstract: In a three-dimensional modeling apparatus, diffusion of fumes generated around the modeling stage accompanying irradiation with an energy beam can be efficiently prevented. Three-dimensional modeling is performed by repeating scanning a modeling material arranged on a modeling stage with laser light to form a solidified layer. A cover is provided that locally surrounds an irradiation portion on the modeling material arranged on the modeling stage irradiated with the laser light, and suppresses diffusion of the fumes caused by irradiation with the laser light. In the cover, a stream of gas containing the fumes is regulated so as to cause the fumes to flow toward an upward portion inside the cover apart from the irradiated portion irradiated with the laser light.

Abstract: Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.

Abstract: In a three-dimensional modeling apparatus, diffusion of fumes generated around the modeling stage accompanying irradiation with an energy beam can be efficiently prevented. Three-dimensional modeling is performed by repeating scanning a modeling material arranged on a modeling stage with laser light to form a solidified layer. A cover is provided that locally surrounds an irradiation portion on the modeling material arranged on the modeling stage irradiated with the laser light, and suppresses diffusion of the fumes caused by irradiation with the laser light. In the cover, a stream of gas containing the fumes is regulated so as to cause the fumes to flow toward an upward portion inside the cover apart from the irradiated portion irradiated with the laser light.

Abstract: Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.

Abstract: A ramp generator circuit, e.g. foreign analog-to-digital converter. The ramp generator circuit has first and second current sources that are maintained in the on condition whether they are being used or not. A switched capacitor connects to the current source in order to create a multi-slope ramp.