Patents by Inventor Dexue Zhang

Dexue Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12237817
    Abstract: Charge leakage/injection suppression circuitry within a capacitive programmable gain amplifier provides a low-impedance expulsion path for residual carriers within a feedback-path amplifier-mode switch and equalizes a voltage across a critical-leakage-path component of that amplifier-mode switch, reducing charge injection and leakage into an otherwise isolated amplifier input node to yield a low-noise amplifier output.
    Type: Grant
    Filed: April 8, 2024
    Date of Patent: February 25, 2025
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 12231798
    Abstract: A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: February 18, 2025
    Assignee: Gigajot Technologies, Inc.
    Inventors: Xin Yue, Dexue Zhang, Jiaju Ma
  • Patent number: 12231793
    Abstract: An image capturing device may include a ramp generator circuit that may be used in performance of analog-to-digital conversion of image signals from pixels of an image sensor. The ramp generator circuit may generate a voltage having one or more rising and/or falling portions, using a reference voltage and an integration current. The ramp generator circuit may include a first sample-and-hold switch and/or a second sample-and-hold switch. The ramp generator circuit may selectively turn off the first and/or the second sample-and-hold switches to hold the reference voltage and/or a bias voltage that is used for generating the integration current during analog-to-digital conversion of the image signals. As a result, reference voltage, bias voltage, and/or integration current may be held and substantially stabilized during the analog-to-digital conversion.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 18, 2025
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 12184300
    Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: December 31, 2024
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Publication number: 20240275351
    Abstract: Charge leakage/injection suppression circuitry within a capacitive programmable gain amplifier provides a low-impedance expulsion path for residual carriers within a feedback-path amplifier-mode switch and equalizes a voltage across a critical-leakage-path component of that amplifier-mode switch, reducing charge injection and leakage into an otherwise isolated amplifier input node to yield a low-noise amplifier output.
    Type: Application
    Filed: April 8, 2024
    Publication date: August 15, 2024
    Applicant: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 11979126
    Abstract: Charge leakage/injection suppression circuitry within a capacitive programmable gain amplifier provides a low-impedance expulsion path for residual carriers within a feedback-path amplifier-mode switch and equalizes a voltage across a critical-leakage-path component of that amplifier-mode switch, reducing charge injection and leakage into an otherwise isolated amplifier input node to yield a low-noise amplifier output.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: May 7, 2024
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Publication number: 20240120934
    Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.
    Type: Application
    Filed: October 25, 2023
    Publication date: April 11, 2024
    Applicant: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 11838030
    Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: December 5, 2023
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 11818489
    Abstract: Multi-stage auto-zeroing signal amplifiers are deployed within event-shuttering pixels of a quanta image sensor (QIS) pixel array to enable reliable per-pixel reporting of photonic events, down to resolution of a single photon strike, for each of a continuous sequence of sub-microsecond event-detection intervals.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: November 14, 2023
    Assignee: Gigajot Technology, Inc.
    Inventors: Dexue Zhang, Saleh Masoodian, Jiaju Ma
  • Publication number: 20230283929
    Abstract: A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.
    Type: Application
    Filed: March 13, 2023
    Publication date: September 7, 2023
    Applicant: Gigajot Technology, Inc.
    Inventors: Xin Yue, Dexue Zhang, Jiaju Ma
  • Patent number: 11694745
    Abstract: Conventional SRAM sense-amplifiers are replaced by small-footprint keeper circuits that enable single-ended SRAM readout without bitline precharge, simplifying and relaxing the timing of SRAM cell access and bitline sampling operations and thus enabling potentially faster readout operation and/or lower bit error rate.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: July 4, 2023
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Publication number: 20230188866
    Abstract: An image capturing device may include a ramp generator circuit that may be used in performance of analog-to-digital conversion of image signals from pixels of an image sensor. The ramp generator circuit may generate a voltage having one or more rising and/or falling portions, using a reference voltage and an integration current. The ramp generator circuit may include a first sample-and-hold switch and/or a second sample-and-hold switch. The ramp generator circuit may selectively turn off the first and/or the second sample-and-hold switches to hold the reference voltage and/or a bias voltage that is used for generating the integration current during analog-to-digital conversion of the image signals. As a result, reference voltage, bias voltage, and/or integration current may be held and substantially stabilized during the analog-to-digital conversion.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 15, 2023
    Applicant: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 11606525
    Abstract: A sub-ranging programmable gain amplifier resolves an incoming signal into one of multiple amplitude sub-ranges and dynamically steps down the PGA output according to the identified sub-range.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: March 14, 2023
    Assignee: Gigajot Technology, Inc.
    Inventors: Xin Yue, Dexue Zhang, Jiaju Ma
  • Patent number: 11469767
    Abstract: Clock and other cyclical signals are driven onto respective capacitively-loaded segments of a distribution path via inverting buffer stages that self-correct for stage-to-stage duty cycle error, yielding a balanced signal duty cycle over the length of the distribution path.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: October 11, 2022
    Assignee: Gigajot Technology, Inc.
    Inventor: Dexue Zhang
  • Patent number: 11272133
    Abstract: Multi-stage auto-zeroing signal amplifiers are deployed within event-shuttering pixels of a quanta image sensor (QIS) pixel array to enable reliable per-pixel reporting of photonic events, down to resolution of a single photon strike, for each of a continuous sequence of sub-microsecond event-detection intervals.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: March 8, 2022
    Assignee: Gigajot Technology, Inc.
    Inventors: Dexue Zhang, Saleh Masoodian, Jiaju Ma
  • Patent number: 10549346
    Abstract: In a three-dimensional modeling apparatus, diffusion of fumes generated around the modeling stage accompanying irradiation with an energy beam can be efficiently prevented. Three-dimensional modeling is performed by repeating scanning a modeling material arranged on a modeling stage with laser light to form a solidified layer. A cover is provided that locally surrounds an irradiation portion on the modeling material arranged on the modeling stage irradiated with the laser light, and suppresses diffusion of the fumes caused by irradiation with the laser light. In the cover, a stream of gas containing the fumes is regulated so as to cause the fumes to flow toward an upward portion inside the cover apart from the irradiated portion irradiated with the laser light.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: February 4, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinya Yasuda, Kimihiro Fujimoto, Dexu Zhang, Takamune Suzuki, Toshihiro Takai, Yutaka Takahashi, Takahiro Harigae
  • Patent number: 9787928
    Abstract: Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: October 10, 2017
    Assignee: Forza Silicon Corporation
    Inventors: Dexue Zhang, Yingying Wang, Loc Truong, Steven Huang
  • Publication number: 20170282245
    Abstract: In a three-dimensional modeling apparatus, diffusion of fumes generated around the modeling stage accompanying irradiation with an energy beam can be efficiently prevented. Three-dimensional modeling is performed by repeating scanning a modeling material arranged on a modeling stage with laser light to form a solidified layer. A cover is provided that locally surrounds an irradiation portion on the modeling material arranged on the modeling stage irradiated with the laser light, and suppresses diffusion of the fumes caused by irradiation with the laser light. In the cover, a stream of gas containing the fumes is regulated so as to cause the fumes to flow toward an upward portion inside the cover apart from the irradiated portion irradiated with the laser light.
    Type: Application
    Filed: March 21, 2017
    Publication date: October 5, 2017
    Inventors: Shinya Yasuda, Kimihiro Fujimoto, Dexu Zhang, Takamune Suzuki, Toshihiro Takai, Yutaka Takahashi, Takahiro Harigae
  • Publication number: 20160198114
    Abstract: Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 7, 2016
    Inventors: Dexue Zhang, Yingying Wang, Loc Truong, Steven Huang
  • Patent number: 8922261
    Abstract: A ramp generator circuit, e.g. foreign analog-to-digital converter. The ramp generator circuit has first and second current sources that are maintained in the on condition whether they are being used or not. A switched capacitor connects to the current source in order to create a multi-slope ramp.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: December 30, 2014
    Assignee: Forza Silicon Corporation
    Inventors: Dexue Zhang, Rami Yassine