Patents by Inventor Dhananjay Kumar Griyage

Dhananjay Kumar Griyage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Signal integrity delay utilizing a window bump-based aggressor alignment scheme
    Patent number: 10325055
    Abstract: This application discloses a computing system configured to determine a timing window for reception of a signal propagated through a victim channel in a circuit design, generate an aggressor window bump for each noise bump capable of being induced on the victim channel by one or more aggressor channels, determine a delta delay corresponding to the timing window for the signal propagated through the victim channel based, at least in part, on one or more of the aggressor window bump, and utilize the delta delay corresponding to the timing window for the signal to determine whether the victim channel operates within a timing constraint associated with the circuit design.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: June 18, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: Dhananjay Kumar Griyage, Mohan Rangan Govindaraj
  • SIGNAL INTEGRITY DELAY UTILIZING A WINDOW BUMP-BASED AGGRESSOR ALIGNMENT SCHEME
    Publication number: 20160292344
    Abstract: This application discloses a computing system configured to determine a timing window for reception of a signal propagated through a victim channel in a circuit design, generate an aggressor window bump for each noise bump capable of being induced on the victim channel by one or more aggressor channels, determine a delta delay corresponding to the timing window for the signal propagated through the victim channel based, at least in part, on one or more of the aggressor window bump, and utilize the delta delay corresponding to the timing window for the signal to determine whether the victim channel operates within a timing constraint associated with the circuit design.
    Type: Application
    Filed: April 3, 2015
    Publication date: October 6, 2016
    Inventors: Dhananjay Kumar Griyage, Mohan Rangan Govindaraj