Abstract: A method performed by a first electronic device that is communicatively coupled to a wireless headset, the method includes, while engaged in a call with a second electronic device, communicating with the wireless headset via a bi-directional wireless audio connection; determining that a joint media playback session has been initiated in which the first and second electronic devices are to independently stream media content for separate playback by both of the first and second electronic devices while engaging in the call; and switching to communicate with the wireless headset via a uni-directional wireless audio connection based on a determination of one or more capabilities of the wireless headset, wherein a mix of 1) one or more signals associated with the call and 2) an audio signal of the media content is transmitted to the wireless headset over the uni-directional wireless audio connection.

Abstract: Imaging systems may be provided with stacked-chip image sensors. A stacked-chip image sensor may include a vertical chip stack that includes an array of image pixels and processing circuitry. The image pixel array may be coupled to the processing circuitry through an array of vertical metal interconnects. The image pixel array may be partitioned into image pixel sub-arrays configured to capture image data at a capture frame rate. The processing circuitry may compress image data associated with each image pixel sub-array in parallel and may output the compressed image data to off-chip image processing circuitry at an output frame rate that is less than the capture frame rate. The processing circuitry may determine respective compression block sizes for each image pixel sub-array with which to compress the associated image data and may determine respective output frame rates for image data from each image pixel sub-array.

Abstract: Imaging systems may be provided with stacked-chip image sensors. A stacked-chip image sensor may include a vertical chip stack that includes an array of image pixels and processing circuitry. The image pixel array may be coupled to the processing circuitry through an array of vertical metal interconnects. The image pixel array may be partitioned into image pixel sub-arrays configured to capture image data at a capture frame rate. The processing circuitry may compress image data associated with each image pixel sub-array in parallel and may output the compressed image data to off-chip image processing circuitry at an output frame rate that is less than the capture frame rate. The processing circuitry may determine respective compression block sizes for each image pixel sub-array with which to compress the associated image data and may determine respective output frame rates for image data from each image pixel sub-array.