Abstract: Described herein is a detachable multi-host computing system (100) having multiple host processors running different operating systems. In one implementation, the multi-host computing system (100) includes a detachable unit (102) and a base unit (104). Each of the detachable unit (102) and the base unit (104) includes an MR-IOV switch and a MR-PCIM for controlling the MR-IOV switch. In one embodiment, the MR-PCIM for both the detachable unit (102) and the base unit (104) is configured such that a single MR-PCIM switch may be used for enumerating peripheral devices connected to the detachable unit (102) and the base unit (104) when the detachable unit (102) and the base unit (104) are in an attached mode.

Abstract: Described herein are methods and system for virtualization of the secure digital (SD) host controller to enable sharing a SD device among various multiple host processors in a multi-processor computing system. In one implementation the method of sharing a SD device amongst a plurality of hosts of a multi-host computing system comprises detecting the SD device on occurrence of a reset event, receiving an enumeration request, from at least a first host and a second host of the plurality of hosts, to enumerate the SD device with respect to the second host, enumerating the SD device with respect to the second host, and initiating data exchange between the SD device and each of the plurality of hosts.

Abstract: In one implementation, an optimized multi-root input-output virtualization (MRIOV) aware switch configured to route data between multiple root complexes and I/O devices is described. The MRIOV aware switch may include two or more upstream ports and one or more downstream ports. Each of an upstream port and a downstream port may include a media access controller (MAC) configured to negotiate link width and link speed for exchange of data packets between the multiple root complexes and the I/O devices. Each of an upstream port and a downstream port may further include a clocking module configured to dynamically configure a clock rate of processing data packets based one or more negotiated link width and negotiated link speed, and a data link layer (DLL) coupled to the MAC configured to operate at the clock rate, wherein the clock rate is indicative of processing speed.

Abstract: Described herein are methods and system for virtualization of the secure digital (SD) host controller to enable sharing a SD device among various multiple host processors in a multi-processor computing system. In one implementation the method of sharing a SD device amongst a plurality of hosts of a multi-host computing system comprises detecting the SD device on occurrence of a reset event, receiving an enumeration request, from at least a first host and a second host of the plurality of hosts, to enumerate the SD device with respect to the second host, enumerating the SD device with respect to the second host, and initiating data exchange between the SD device and each of the plurality of hosts.

Abstract: Systems and methods for sharing a single root I/O virtualization (SR-IOV) device (106) amongst a plurality of roots (104) are described herein. The described systems implement a method which includes identifying a physical function (PF) and a plurality of virtual functions (VFs) associated with the SR-IOV device (106). The method also include generating at least one set of VFs from amongst the plurality of identified VFs, where each set of VFs include one or more VFs, and generating a pseudo PF (PPF) for each of the at least one set of VFs, where each PPF and a set of VFs associated with the PPF forms a projected SR-IOV device (106). The method further includes associating each of the projected SR-IOV device (106) with a root (104) from amongst the plurality of roots (104) to allow sharing of the SR-IOV device (106).

Abstract: Systems and methods for sharing a single root I/O virtualization (SR-IOV) device (106) amongst a plurality of roots (104) are described herein. The described systems implement a method which includes identifying a physical function (PF) and a plurality of virtual functions (VFs) associated with the SR-IOV device (106). The method also include generating at least one set of VFs from amongst the plurality of identified VFs, where each set of VFs include one or more VFs, and generating a pseudo PF (PPF) for each of the at least one set of VFs, where each PPF and a set of VFs associated with the PPF forms a projected SR-IOV device (106). The method further includes associating each of the projected SR-IOV device (106) with a root (104) from amongst the plurality of roots (104) to allow sharing of the SR-IOV device (106).

Abstract: The present subject matter discloses methods and systems of sharing of peripheral devices in multi host computing systems (100). In one implementation, the method of sharing a peripheral device (116) amongst a plurality of hosts of the multi-host computing system (100) comprises receiving a request to switch the peripheral device (116) from a first operating system running on a first host from amongst the plurality of hosts to a second operating system running on a second host from amongst the plurality of hosts; generating a request for the first operating system to relinquish control of the peripheral device (116); determining the status of the relinquishment based on response generated by the first operating system; initiating a request for the second operating system to install a device driver for the peripheral device (116) upon determining successful relinquishment; and transferring ownership of the peripheral device (116) to the second operating system.

Abstract: Disclosed herein is a system having a multi-processor configuration for electronics devices and systems, such as, computing and communication devices like laptop, notebook, tablets, smartphones, etc. In accordance with one embodiment of the subject matter the system comprises a plurality of processors and a multi protocol multi-root input output virtualization (MPMRIOV) switch communicatively coupled to at least one of the plurality of processors. The system further includes a peripheral and interface virtualization unit (PIVU) coupled to the MPMRIOV switch. In said embodiment, the PIVU is configured to communicatively couple at least one of the plurality of processors with at least one of a Peripheral Component Interconnect (PCI) compliant peripheral, a Peripheral Component Interconnect express (PCIe) compliant peripheral, a non PCI compliant peripheral, and a non PCIe compliant peripheral.

Abstract: The present subject matter discloses methods and systems of sharing of peripheral devices in multi host computing systems (100). In one implementation, the method of sharing a peripheral device (116) amongst a plurality of hosts of the multi-host computing system (100) comprises receiving a request to switch the peripheral device (116) from a first operating system running on a first host from amongst the plurality of hosts to a second operating system running on a second host from amongst the plurality of hosts; generating a request for the first operating system to relinquish control of the peripheral device (116); determining the status of the relinquishment based on response generated by the first operating system; initiating a request for the second operating system to install a device driver for the peripheral device (116) upon determining successful relinquishment; and transferring ownership of the peripheral device (116) to the second operating system.

Abstract: Described herein are methods and system for virtualization of the secure digital (SD) host controller to enable sharing a SD device among various multiple host processors in a multi-processor computing system. In one implementation the method of sharing a SD device amongst a plurality of hosts of a multi-host computing system comprises detecting the SD device on occurrence of a reset event, receiving an enumeration request, from at least a first host and a second host of the plurality of hosts, to enumerate the SD device with respect to the second host, enumerating the SD device with respect to the second host, and initiating data exchange between the SD device and each of the plurality of hosts.

Abstract: In one implementation, an optimized multi-root input-output virtualization (MRIOV) aware switch configured to route data between multiple root complexes and I/O devices is described. The MRIOV aware switch may include two or more upstream ports and one or more downstream ports. Each of an upstream port and a downstream port may include a media access controller (MAC) configured to negotiate link width and link speed for exchange of data packets between the multiple root complexes and the I/O devices. Each of an upstream port and a downstream port may further include a clocking module configured to dynamically configure a clock rate of processing data packets based one or more negotiated link width and negotiated link speed, and a data link layer (DLL) coupled to the MAC configured to operate at the clock rate, wherein the clock rate is indicative of processing speed.

Abstract: Described herein is a detachable multi-host computing system (100) having multiple host processors running different operating systems. In one implementation, the multi-host computing system (100) includes a detachable unit (102) and a base unit (104). Each of the detachable unit (102) and the base unit (104) includes an MR-IOV switch and a MR-PCIM for controlling the MR-IOV switch. In one embodiment, the MR-PCIM for both the detachable unit (102) and the base unit (104) is configured such that a single MR-PCIM switch may be used for enumerating peripheral devices connected to the detachable unit (102) and the base unit (104) when the detachable unit (102) and the base unit (104) are in an attached mode.

Abstract: Disclosed herein is a system having a multi-processor configuration for electronics devices and systems, such as, computing and communication devices like laptop, notebook, tablets, smartphones, etc. In accordance with one embodiment of the subject matter the system comprises a plurality of processors and a multi protocol multi-root input output virtualization (MPMRIOV) switch communicatively coupled to at least one of the plurality of processors. The system further includes a peripheral and interface virtualization unit (PIVU) coupled to the MPMRIOV switch. In said embodiment, the PIVU is configured to communicatively couple at least one of the plurality of processors with at least one of a Peripheral Component Interconnect (PCI) compliant peripheral, a Peripheral Component Interconnect express (PCIe) compliant peripheral, a non PCI compliant peripheral, and a non PCIe compliant peripheral.

Abstract: A system having a multi protocol multi-root aware (MP-MRA) switch (102) configured to route data between multiple host processors (104) and multiple I/O devices (106) is described herein. In said embodiment, the MP-MRIOV aware switch includes a switch routing module (108), at least one upstream adaptive module (110), and at least one downstream adaptive module (112). The upstream adaptive module (110) is configured to map information in a primary communication protocol to a intermediate communication protocol at which the switch routing module operates. Further, the downstream adaptive module (112) maps the intermediate communication protocol to a secondary communication protocol at which the I/O device (106) operates.