Abstract: A serial data receiver subsystem included in a computer system may include a data detection circuit, a speed detection circuit, and a receiver circuit that includes multiple subcircuits. The data detection circuit performs a comparison a reference voltage to the magnitude of signals received via a communication link that encode a serial data stream consisting of multiple data symbols. Using a result of the comparison, the data detection circuit may activate a indicating the presence of data on the communication link. Once the is active, the speed detection circuit checks the number of transitions to determine a rate at which data is being transmitted. In response to a determination that the rate of the data being transmitted exceeds a threshold value, the receiver circuit activates one or more of the multiple subcircuits.