Abstract: Embodiments herein relate to a module which can be inserted into or removed from a computing device by a user. The module includes an input-output port which is configured for a desired specification, such as USB-A, USB-C, Thunderbolt, DisplayPort or HDMI. The port can be provided on an expansion card such as an M.2 card for communicating with a host platform. The host platform can communicate with different types of modules in a standardized way so that complexity and costs are reduced. In another aspect, with a dual port module, the host platform can concurrently send/receive power through one port and send/receive data from the other port.

Abstract: Techniques and mechanisms for identifying a power state to be provided with an integrated circuit (IC). In an embodiment, evaluator circuitry of a system-on-chip is programmable based on multiple criteria which are each for a different respective power mode. Programming of the evaluator circuitry enables concurrent evaluations each to determine, for a different respective power mode, whether a detected state of the IC is able to accommodate said power mode. Results of the evaluations are communicated, in parallel with each other, to circuitry which selects one such power mode based on relative priorities of the power modes with respect to each other. In another embodiment, the evaluator circuitry comprises an array of circuit cells which are configurable each to perform a different respective evaluation based on a corresponding combination of a test condition and a detected condition of the IC.

Abstract: Techniques and mechanisms for identifying a power state to be provided with an integrated circuit (IC). In an embodiment, evaluator circuitry of a system-on-chip is programmable based on multiple criteria which are each for a different respective power mode. Programming of the evaluator circuitry enables concurrent evaluations each to determine, for a different respective power mode, whether a detected state of the IC is able to accommodate said power mode. Results of the evaluations are communicated, in parallel with each other, to circuitry which selects one such power mode based on relative priorities of the power modes with respect to each other. In another embodiment, the evaluator circuitry comprises an array of circuit cells which are configurable each to perform a different respective evaluation based on a corresponding combination of a test condition and a detected condition of the IC.

Abstract: Embodiments of the invention are directed towards scalable and dynamically configurable (and reconfigurable) device host controller solutions for system platform controller hubs (PCH). Embodiments of the invention may include logic or modules to detect a device coupled to a common I/O port (alternatively referred to as a converged I/O port) of a host system and determine its device type. Said logic or modules may further load host controller firmware for the device type from a memory to a processing core, such that the processing core will execute the host controller firmware to enable data transfer between the device and the host system. Said processing core may be configured and reconfigured based on the device type connected to the associated common I/O port.

Abstract: Embodiments of the invention are directed towards scalable and dynamically configurable (and reconfigurable) device host controller solutions for system platform controller hubs (PCH). Embodiments of the invention may include logic or modules to detect a device coupled to a common I/O port (alternatively referred to as a converged I/O port) of a host system and determine its device type. Said logic or modules may further load host controller firmware for the device type from a memory to a processing core, such that the processing core will execute the host controller firmware to enable data transfer between the device and the host system. Said processing core may be configured and reconfigured based on the device type connected to the associated common I/O port.

Abstract: An embodiment may include circuitry to communicatively couple, at least in part, a serial bus controller to at least one serial bus device. The circuitry may have at least one port to be communicatively coupled to the at least one device. The circuitry may route, at least in part, at least one packet issued, at least in part, from the controller to the at least one device via the at least one port based at least in part upon at least one address. The circuitry may associate, at least in part, the at least one address with the at least one port. The at least one address may be assigned, at least in part, to the at least one device by the controller as a result, at least in part, of enumeration, at least in part, of the at least one device by the controller.

Abstract: A device, method, and system are disclosed. In one embodiment, the device includes a data reception unit that receives data from an interconnect, and a data suppression unit that receives a target address from the interconnect, determines if the target address is local to the device, and, if the target address is not local to the device, the data suppression unit suppresses the interconnect from switching at the interconnect entry point into the data reception unit.