Abstract: A method of ganging memories in an Integrated Circuit (IC) design identifies a first subset of a first set of the memories that have word counts in a common power of two range, a common count of memory blocks, and a common column multiplexing factor, a first memory that does not have a word count in the common power of two range, a second memory of the first set of memories that does not have at least one of a common count of memory blocks and a common column multiplexing factor, and then inserts a common scrambling unit, a common chip select unit, a common comparator, a common repairing unit, a first scrambling unit, a second scrambling unit, a first comparator, and a first repairing unit into the IC design.