Patents by Inventor Dhivya Ravichandran

Dhivya Ravichandran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Serial Communications Module With CRC
    Publication number: 20240063816
    Abstract: A circuit with an interface, a transmit data register coupled to the interface, a storage device coupled to the transmit data register and including a plurality of storage locations, each storage location adapted to store a data unit, and a serial register coupled between the storage device and an output. The circuit also includes a CRC generation circuit having an input coupled between an output of the transmit data register and the storage device. The CRC generation circuit includes a first CRC generation block for providing a CRC in response to an X-bit data unit and an X-bit polynomial and a second CRC generation block with a collective X-bit input for providing a CRC in response to an X-bit data unit and a 2X-bit polynomial in a single clock cycle and a 2X-bit data unit and a 2X-bit polynomial in two clock cycles.
    Type: Application
    Filed: November 2, 2023
    Publication date: February 22, 2024
    Inventors: Robin Osa Hoel, Anand Kumar G, Dhivya Ravichandran, Aniruddha Periyapatna Nagendra
  • Serial communications module with CRC
    Patent number: 11855655
    Abstract: A circuit with an interface, a transmit data register coupled to the interface, a storage device coupled to the transmit data register and including a plurality of storage locations, each storage location adapted to store a data unit, and a serial register coupled between the storage device and an output. The circuit also includes a CRC generation circuit having an input coupled between an output of the transmit data register and the storage device. The CRC generation circuit includes a first CRC generation block for providing a CRC in response to an X-bit data unit and an X-bit polynomial and a second CRC generation block with a collective X-bit input for providing a CRC in response to an X-bit data unit and a 2X-bit polynomial in a single clock cycle and a 2X-bit data unit and a 2X-bit polynomial in two clock cycles.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: December 26, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Robin Osa Hoel, Anand Kumar G, Dhivya Ravichandran, Aniruddha Periyapatna Nagendra
  • Serial Communications Module With CRC
    Publication number: 20230132069
    Abstract: A circuit with an interface, a transmit data register coupled to the interface, a storage device coupled to the transmit data register and including a plurality of storage locations, each storage location adapted to store a data unit, and a serial register coupled between the storage device and an output. The circuit also includes a CRC generation circuit having an input coupled between an output of the transmit data register and the storage device. The CRC generation circuit includes a first CRC generation block for providing a CRC in response to an X-bit data unit and an X-bit polynomial and a second CRC generation block with a collective X-bit input for providing a CRC in response to an X-bit data unit and a 2X-bit polynomial in a single clock cycle and a 2X-bit data unit and a 2X-bit polynomial in two clock cycles.
    Type: Application
    Filed: March 31, 2022
    Publication date: April 27, 2023
    Inventors: Robin Osa Hoel, Anand Kumar G, Dhivya Ravichandran, Aniruddha Periyapatna Nagendra