Patents by Inventor Dhruv SINGH

Dhruv SINGH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10073138
    Abstract: An apparatus is described that includes a plurality of circuits each designed to exhibit a unique signature code that is determined from manufacturing tolerances associated with a manufacturing process used to manufacture the circuits. The apparatus also includes error circuitry to determine an error has arisen based on a change in signature codes from the plurality of circuits.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: September 11, 2018
    Assignee: Intel Corporation
    Inventors: Suraj Sindia, Robert Kwasnick, Dhruv Singh
  • Publication number: 20180095802
    Abstract: In one embodiment, a method comprises determining, at a plurality of instances in time, a value of at least one stress characteristic of a hardware resource; determining an accumulated stress value of the hardware resource, the accumulated stress value comprising the sum of a plurality of incremental stress values, an incremental stress value determined based on the value of the at least one stress characteristic at a particular instance in time; and generating a first stress indicator in response to a determination that the accumulated stress value of the hardware resource is greater than a first threshold stress value associated with the hardware resource.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Applicant: Intel Corporation
    Inventors: Hang T. Nguyen, Gordon McFadden, Pradeepsunder Ganesh, Stephen Thomas Palermo, Travis J. White, Ashok Raj, Vivek Garg, Dhruv Singh
  • Publication number: 20170176527
    Abstract: An apparatus is described that includes a plurality of circuits each designed to exhibit a unique signature code that is determined from manufacturing tolerances associated with a manufacturing process used to manufacture the circuits. The apparatus also includes error circuitry to determine an error has arisen based on a change in signature codes from the plurality of circuits.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Suraj SINDIA, Robert KWASNICK, Dhruv SINGH