Patents by Inventor Dhruva Chakrabarti

Dhruva Chakrabarti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180253384
    Abstract: Examples herein involve a variable cache. An example variable cache controller obtains cache lines corresponding to accesses of a non-volatile memory of a system, monitors access history of the non-volatile memory, determines a number of distinct objects accessed in the access history during a time period from the object information, and sets a size of a variable cache of the system based on the number of distinct objects accessed in the access history during the time period.
    Type: Application
    Filed: September 25, 2015
    Publication date: September 6, 2018
    Inventors: Pengcheng Li, Dhruva Chakrabarti
  • Patent number: 10019363
    Abstract: Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a processor, a copy command to version an image page for an atomic transaction. The version controller may receive application data addressed to a cache line of the image page, and may write the application data to a cache line of the copy page corresponding to the addressed cache line of the image page. If the version controller receives a replace-type transaction commit command, the version controller may generate a final page by either forward merging the image page into the copy page or backward merging the copy page into the image page, depending a merge direction policy.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: July 10, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Douglas L. Voigt, Charles B. Morrey, III, Jishen Zhao, Dhruva Chakrabarti, Joseph E. Foster
  • Publication number: 20170351606
    Abstract: According to an example, persistent memory garbage collection may include determining whether termination of a program is based on a specified termination of the program during execution of the program or an unspecified termination of the program during the execution of the program. In response to a determination that the termination of the program is based on the specified termination of the program during the execution of the program, persistent metadata stored in a persistent memory may be used to restart the program. In response to a determination that the termination of the program is based on the unspecified termination of the program during the execution of the program, the persistent metadata stored in the persistent memory may be used to collect garbage from the persistent memory and to restart the program.
    Type: Application
    Filed: January 9, 2015
    Publication date: December 7, 2017
    Inventors: Dhruva Chakrabarti, Kumud Bhandari
  • Publication number: 20170286297
    Abstract: Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a processor, a copy command to version an image page for an atomic transaction. The version controller may receive application data addressed to a cache line of the image page, and may write the application data to a cache line of the copy page corresponding to the addressed cache line of the image page. If the version controller receives a replace-type transaction commit command, the version controller may generate a final page by either forward merging the image page into the copy page or backward merging the copy page into the image page, depending a merge direction policy.
    Type: Application
    Filed: April 3, 2015
    Publication date: October 5, 2017
    Inventors: Douglas L. Voigt, Charles B. MORREY, III, Jishen ZHAO, Dhruva CHAKRABARTI, Joseph E. FOSTER
  • Patent number: 9612757
    Abstract: Crash recovery with asynchronous consistent snapshots in persistent memory stores of a processing environment. A processing environment includes a user program and infrastructure-maintained data structures. The infrastructure-maintained data structures include a log of updates made to program data structures and a snapshot of the state of the program data structures. The systems and methods include writing log entries in the log to a transient memory. The log entries correspond to store instructions and memory management instructions operating on a nonvolatile memory (NVM), and input/output (I/O) operations executed by program instructions of the user program. Each of the log entries represents an effect of a corresponding operation in the program instructions. The systems and methods also include creating a snapshot in the NVM after a consistent program point based on the log of updates. The snapshot provides a rollback position during restart following a crash.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: April 4, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Dhruva Chakrabarti
  • Patent number: 9535836
    Abstract: A technique includes performing an update to a location of a non-volatile memory. The update is created by execution of at least one machine executable instruction of a plurality of machine executable instructions. The technique includes using a processor-based machine to selectively track the update to allow recovery of the execution to a given consistency point based at least in part on whether the machine executable instruction(s) creating the update are located within a synchronized section of the plurality of machine executable instructions.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: January 3, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dhruva Chakrabarti, Hans Boehm
  • Patent number: 9465648
    Abstract: A system includes an initiator and processing nodes. The initiator distributes portions of a transaction among the processing nodes. Each processing node has at least one downstream neighbor to which the processing node sends commit messages. The commit messages include a commit status of the processing node. The downstream neighbor is also a processing node.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: October 11, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Alan H. Karp, Wojciech Golab, Terence P. Kelly, Dhruva Chakrabarti
  • Publication number: 20160246724
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control a cache. An example method includes monitoring cache lines in a cache, the cache lines storing recently written data to the cache, the recently written data corresponding to main memory, comparing a total quantity of the cache lines to a threshold that is less than a cache line storage capacity of the cache, and causing a write back of at least one of the cache lines to the main memory when a store event causes the total quantity of the cache lines to satisfy the threshold.
    Type: Application
    Filed: October 31, 2013
    Publication date: August 25, 2016
    Applicant: Hewlett Packard Enterprise Development LP
    Inventors: Hans Boehm, Dhruva Chakrabarti
  • Publication number: 20160239372
    Abstract: Disclosed herein are a system, non-transitory computer readable medium, and method for recovering from an abnormal failure of a program. Changes made by a plurality of threads of the program are undone in a reverse order in which the changes were made.
    Type: Application
    Filed: September 26, 2013
    Publication date: August 18, 2016
    Inventor: Dhruva Chakrabarti
  • Publication number: 20160055095
    Abstract: A method for performing memory operations is provided. One or more processors can determine that at least a portion of data stored in a cache memory of the one or more processors is to be stored in the main memory. One or more ranges of addresses of the main memory is determined that correspond to a plurality of cache lines in the cache memory. A set of cache lines corresponding to addresses in the one or more ranges of addresses is identified, so that data stored in the identified set can be stored in the main memory. For each cache line of the identified set having data that has been modified since that cache line was first loaded to the cache memory or since a previous store operation, data stored in that cache line is caused to be stored in the main memory.
    Type: Application
    Filed: March 28, 2013
    Publication date: February 25, 2016
    Inventors: Paolo Faraboschi, Hans Boehm, Dhruva Chakrabarti, Naveen Muralimanohar
  • Patent number: 9208080
    Abstract: A technique includes identifying a dependency between a first persistent memory region and at least one other persistent memory region. The technique includes using a process having access to the first persistent memory region to selectively perform garbage collection for the first persistent memory region based at least in part on whether the process has access to the other persistent memory region(s) from which the first persistent memory region depends.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: December 8, 2015
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Dhruva Chakrabarti
  • Publication number: 20150261463
    Abstract: Crash recovery with asynchronous consistent snapshots in persistent memory stores of a processing environment. A processing environment includes a user program and infrastructure-maintained data structures. The infrastructure-maintained data structures include a log of updates made to program data structures and a snapshot of the state of the program data structures. The systems and methods include writing log entries in the log to a transient memory. The log entries correspond to store instructions and memory management instructions operating on a nonvolatile memory (NVM), and input/output (I/O) operations executed by program instructions of the user program. Each of the log entries represents an effect of a corresponding operation in the program instructions. The systems and methods also include creating a snapshot in the NVM after a consistent program point based on the log of updates. The snapshot provides a rollback position during restart following a crash.
    Type: Application
    Filed: October 19, 2012
    Publication date: September 17, 2015
    Inventor: Dhruva Chakrabarti
  • Patent number: 9002791
    Abstract: A log entry is created in persistent memory that represents a modification to a variable that resides in persistent memory. A log entry is created in persistent memory that represents a synchronization operation. A program-order based dynamic ordering relationship is created between two successive log entries within an execution entity. A synchronization-order based dynamic ordering relationship is created between two log entries corresponding to synchronization operations in concurrently executing distinct execution entities of said execution instance.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: April 7, 2015
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Dhruva Chakrabarti, Hans Boehm
  • Patent number: 8909987
    Abstract: In one example, a method for implementing recovery segments includes sending an application message from a parent process executed by a first computing device to a child process executed by a second computing device and identifying a dependency created by the application message. This identified dependency is included in a dependence set of the child process and saved. A checkpoint is generated by the parent process and a checkpoint message that includes dependency information is sent from the parent process to the child process. The child process modifies the dependence set according to the dependency information and generates a second checkpoint that is saved in nonvolatile memory of the second computing device. Upon occurrence of a failure of the parent process, the child process reverts to a most recent checkpoint generated by the child process that does not include the effects of processing an orphan message.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: December 9, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Alan H. Karp, Dhruva Chakrabarti, Wojciech Golab, Terence P. Kelly
  • Publication number: 20140359201
    Abstract: A technique includes identifying a dependency between a first persistent memory region and at least one other persistent memory region. The technique includes using a process having access to the first persistent memory region to selectively perform garbage collection for the first persistent memory region based at least in part on whether the process has access to the other persistent memory region(s) from which the first persistent memory region depends.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventor: Dhruva Chakrabarti
  • Patent number: 8813042
    Abstract: In a method of identifying a globally consistent state in a multithreaded program, a plurality of locally consistent states is identified, in which a locally consistent state of a thread comprises a set of memory locations and their corresponding data values accessed between points in the multithreaded program where no locks are held. Globally consistent states are identified based at least in part on the locally consistent states.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: August 19, 2014
    Assignee: Hwlett-Packard Development Company, L. P.
    Inventor: Dhruva Chakrabarti
  • Publication number: 20140067761
    Abstract: A log entry is created in persistent memory that represents a modification to a variable that resides in persistent memory. A log entry is created in persistent memory that represents a synchronization operation. A program-order based dynamic ordering relationship is created between two successive log entries within an execution entity. A synchronization-order based dynamic ordering relationship is created between two log entries corresponding to synchronization operations in concurrently executing distinct execution entities of said execution instance.
    Type: Application
    Filed: August 28, 2012
    Publication date: March 6, 2014
    Inventors: Dhruva CHAKRABARTI, Hans Boehm
  • Publication number: 20140040898
    Abstract: A system includes an initiator and processing nodes. The initiator distributes portions of a transaction among the processing nodes. Each processing node has at least one downstream neighbor to which the processing node sends commit messages. The commit messages include a commit status of the processing node. The downstream neighbor is also a processing node.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 6, 2014
    Inventors: Alan H. KARP, Wojciech GOLAB, Terence P. KELLY, Dhruva CHAKRABARTI
  • Publication number: 20130290780
    Abstract: In one example, a method for implementing recovery segments includes sending an application message from a parent process executed by a first computing device to a child process executed by a second computing device and identifying a dependency created by the application message. This identified dependency is included in a dependence set of the child process and saved. A checkpoint is generated by the parent process and a checkpoint message that includes dependency information is sent from the parent process to the child process. The child process modifies the dependence set according to the dependency information and generates a second checkpoint that is saved in nonvolatile memory of the second computing device. Upon occurrence of a failure of the parent process, the child process reverts to a most recent checkpoint generated by the child process that does not include the effects of processing an orphan message.
    Type: Application
    Filed: April 27, 2012
    Publication date: October 31, 2013
    Inventors: Alan H. Karp., Dhruva Chakrabarti, Wojciech Golab, Terence P. Kelly
  • Publication number: 20130268945
    Abstract: In a method of identifying a globally consistent state in a multithreaded program, a plurality of locally consistent states is identified, in which a locally consistent state of a thread comprises a set of memory locations and their corresponding data values accessed between points in the multithreaded program where no locks are held. Globally consistent states are identified based at least in part on the locally consistent states.
    Type: Application
    Filed: April 6, 2012
    Publication date: October 10, 2013
    Inventor: Dhruva Chakrabarti