Patents by Inventor Di Liu
Di Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250115250Abstract: Methods and systems for motion detection include performing a first prediction to predict voxel occupancy based on a sequence of input point clouds including a current point cloud and a set of previous point clouds. A second prediction is performed to predict voxel occupancy for the sequence of input point clouds using predicted voxel occupancy between the input point clouds. Motion detection is performed based on the completed voxel occupancy. An action is performed responsive to a detected motion.Type: ApplicationFiled: October 1, 2024Publication date: April 10, 2025Inventors: Bingbing Zhuang, Manmohan Chandraker, Di Liu
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Patent number: 12271329Abstract: Systems, apparatuses and methods may provide for technology that collects, by a BIOS (basic input output system), memory information from a first host path to a coherent device memory on a memory expander, wherein the memory expander includes a plurality of host paths, transfers the memory information from the BIOS to an OS (operating system) via one or more OS interface tables, and initializes, by the OS, the memory expander based on the memory information, wherein the memory information includes memory capabilities and configuration settings associated with the memory expander.Type: GrantFiled: November 24, 2020Date of Patent: April 8, 2025Assignee: Intel CorporationInventors: Zhuangzhi Li, Jie Bai, Di Zhang, Changcheng Liu, Zhonghua Sun
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Patent number: 12272645Abstract: Embodiments of three-dimensional memory devices and fabricating methods thereof are disclosed. One disclosed method for forming a memory structure comprises: forming a bottom conductive layer on a substrate; forming a dielectric stack on the bottom conductive layer, the dielectric stack comprising a plurality of alternatively arranged first dielectric layers and second dielectric layers; forming an opening penetrating the dielectric stack and exposing the bottom conductive layer; forming a cap layer on a bottom of the opening; forming a cylindrical body and a top contact on the cap layer and in the opening; and replacing the plurality of second dielectric layers with conductive layers.Type: GrantFiled: May 6, 2022Date of Patent: April 8, 2025Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Lei Liu, Yuancheng Yang, Wenxi Zhou, Kun Zhang, Di Wang, Tao Yang, Dongxue Zhao, Zhiliang Xia, Zongliang Huo
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Publication number: 20250103619Abstract: Embodiments of the disclosed technologies obtain evidence from at least one electronic data source. The evidence can include unstructured data associated with an entity. A set of entity features is extracted from the evidence. The set of entity features includes at least one digital description of expertise associated with the entity. The set of entity features, including the at least one digital description of expertise, is encoded, in digital form, into an entity feature embedding. At least one entity expertise embedding is extracted from the entity feature embedding. The at least one entity expertise embedding encodes an entity domain and a level of expertise of the entity in the entity domain. The at least one entity expertise embedding can be stored in digital form as an entity embedding and/or provided to at least one downstream process, model, component, network, and/or system.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Inventors: Gungor Polatkan, Jun Liu, Diane Lee, Rui Ma, Yanen Li, Di Zhou, Zhuliu Li, Necip Fazil Ayan
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Publication number: 20250107271Abstract: The present disclosure relates to a solar cell, a sliced cell and a manufacturing method thereof, a photovoltaic module, and a photovoltaic system. The solar cell includes a substrate, a doped conductive layer, a first passivation film layer, and a first dielectric layer; the doped conductive layer being arranged on a first surface of the substrate; the first passivation film layer and the first dielectric layer being sequentially stacked on a side of the doped conductive layer facing away from the substrate; and the doped conductive layer, the first passivation film layer, and the first dielectric layer all covering the first surface of the substrate; wherein the substrate further includes a plurality of first side surfaces adjacent to the first surface, and the first passivation film layer further covers at least part of surfaces of the plurality of first side surfaces.Type: ApplicationFiled: July 24, 2024Publication date: March 27, 2025Applicant: TRINA SOLAR CO., LTD.Inventors: Hong CHEN, Yifeng CHEN, Di LIU, Wenxing DU
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Publication number: 20250102410Abstract: Provided is a method for calibrating a deformation pressure of a large-volume press. The method for calibrating the deformation pressure of the large-volume press includes: depositing a conductive layer onto a surface of a bevel plug to obtain a conductive bevel plug; assembling the conductive bevel plug, a molybdenum pillar, a magnesium oxide tube, a magnesium oxide sample chamber, a magnesium oxide octahedron and a calibration standard material, placing a resulting system in the large-volume press, and subjecting the resulting system to a large-volume press pressure correction experiment.Type: ApplicationFiled: November 10, 2023Publication date: March 27, 2025Applicant: Jilin UniversityInventors: Kuo HU, Xinyu ZHAO, Ran LIU, Dan XU, Di YAO, Saisai WANG, Jinze HE, Zhaodong LIU, Bingbing LIU
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Patent number: 12260492Abstract: A method for training a three-dimensional face reconstruction model includes inputting an acquired sample face image into a three-dimensional face reconstruction model to obtain a coordinate transformation parameter and a face parameter of the sample face image; determining the three-dimensional stylized face image of the sample face image according to the face parameter of the sample face image and the acquired stylized face map of the sample face image; transforming the three-dimensional stylized face image of the sample face image into a camera coordinate system based on the coordinate transformation parameter, and rendering the transformed three-dimensional stylized face image to obtain a rendered map; and training the three-dimensional face reconstruction model according to the rendered map and the stylized face map of the sample face image.Type: GrantFiled: January 20, 2023Date of Patent: March 25, 2025Assignee: Beijing Baidu Netcom Science Technology Co., Ltd.Inventors: Di Wang, Ruizhi Chen, Chen Zhao, Jingtuo Liu, Errui Ding, Tian Wu, Haifeng Wang
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Patent number: 12259431Abstract: A power supply processing device includes three electric control valve groups, a positive output terminal and a conversion control switch group. The conversion control switch group includes a selection switch group configured to selectively connect the current valve control components in each electric control valve group to the positive output terminal or the phase output terminal, and a connection switch group configured to connect or disconnect a current path between two electric control valve groups connected one another. In such a way, both AC experiments and DC experiments of high voltage and large capacity may be performed to the connectors without changing experimental site and experimental equipment, thereby effectively reducing the experimental cost.Type: GrantFiled: May 11, 2021Date of Patent: March 25, 2025Assignee: GUANG'AN ELECTRICAL TESTING CENTER (GUANGDONG) CO., LTD.Inventors: Zhili Lin, Renxu Yang, Di Chen, Xiangrong Guo, Chengxu Liu, Guifen Ma, Yong Pu, Binhai Li, Yatao Fang
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Patent number: 12262533Abstract: A three-dimensional (3D) memory device includes a first memory cell, a second memory cell, a control gate between the first and second memory cells, a top contact coupled to the first memory cell, and a bottom contact coupled to the second memory cell. The first memory cell can include a first pillar, a first insulating layer surrounding the first pillar, a first gate contact coupled to a first word line, and a second gate contact coupled to a first plate line. The second memory cell can include a second pillar, a second insulating layer surrounding the second pillar, a third gate contact coupled to a second word line, and a fourth gate contact coupled to a second plate line. The 3D memory device can utilize dynamic flash memory (DFM), increase storage density, provide multi-cell storage, provide a three-state logic, decrease leakage current, increase retention time, and decrease refresh rates.Type: GrantFiled: April 28, 2022Date of Patent: March 25, 2025Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Tao Yang, Dongxue Zhao, Yuancheng Yang, Lei Liu, Kun Zhang, Di Wang, Wenxi Zhou, Zhiliang Xia, Zongliang Huo
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Publication number: 20250096437Abstract: A battery cell includes a housing, an electrode assembly, and a current collector member, where the housing has an electrode lead-out member. The electrode assembly is accommodated in the housing and includes tabs. The current collector member is configured to electrically connect the tabs to the electrode lead-out member, where the current collector member is welded to the electrode lead-out member, the current collector member includes a conductive protective layer, and the conductive protective layer is disposed on a side of the current collector member facing away from the electrode lead-out member.Type: ApplicationFiled: December 5, 2024Publication date: March 20, 2025Inventors: Di NIU, Qinglin BAI, Hao MENG, Xin GUO, Tao FENG, Siqi LIU
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Publication number: 20250087795Abstract: A battery includes a housing, a core, a first connection piece, and a plate. The core is disposed in the housing. The first connection piece is disposed on one end of the housing. The first connection piece is connected to the core. The plate is disposed on the side of the first connection piece facing away from the core. The side surface of the plate facing away from the first connection piece is provided with at least two concave arc-shaped grooves at intervals. All of the arc-shaped grooves are uniformly disposed annularly along the center of the plate. Groove bottoms of the arc-shaped grooves are welded to the first connection piece.Type: ApplicationFiled: October 14, 2022Publication date: March 13, 2025Inventors: Di WU, Kaibo LI, Wei HE, Jincheng LIU
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Publication number: 20250086087Abstract: Computer implemented methods, systems, and computer program products include program code executing on a processor(s) obtain factor(s) relevant to a given resource. The program code determines relationships between the factor(s). Based on parameters comprising the relationships, the program code identifies, from a search space, configuration(s) for resource(s) and configuration(s) for workload(s) in the computing environment. The program code executes, based on a pre-defined policy, a test: a workload configured according to a configuration in a system under test instance configured according to a configuration. The program code obtains performance measurements for the test in the system under test instance. The program code utilizes the performance measurements to update a known data set.Type: ApplicationFiled: September 7, 2023Publication date: March 13, 2025Inventors: Ying MO, Wu DI, Xing TIAN, Qing Zhi YU, Nan CHEN, Ju Ling LIU
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Patent number: 12248050Abstract: Disclosed are a dynamic error measurement apparatus, system, and method for an electricity meter. The measurement apparatus includes a test signal generation unit configured to generate a voltage test signal and two-circuit current test signals, output the voltage test signal to a measurement unit, and output the two-circuit current test signals to the measurement unit and a current summation unit; the measurement unit configured to determine two-circuit electric energy values based on the voltage test signal and the two-circuit current test signals, and output the two-circuit electric energy values to a calculation control unit; the current summation unit configured to determine a combined current signal based on the two-circuit current test signals; and the calculation control unit configured to determine a total electric energy value based on the two-circuit electric energy values. The system includes a standard meter and a measurement apparatus.Type: GrantFiled: November 4, 2022Date of Patent: March 11, 2025Assignees: Power Supply Service and Management Center, State Grid Jiangxi Electric Power Co., Ltd., Beijing University of Chemical TechnologyInventors: Jian Ma, Tao Hu, Xuewei Wang, Kexu Chen, Di Wu, Yan Zhao, Gaofeng Deng, Qiang Liu, Aichao Yang, Yanlinzi Huang
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Publication number: 20250079568Abstract: Disclosed is a fully immersed energy storage device, which includes a casing and a water pump. An insulation box is mounted inside the casing, and the insulation box is assembled with an assembly plate thereon. A mounting platform is mounted on the assembly plate and assembled with an annular rack. A rotating groove is provided between the mounting platform and the annular rack. Balls are placed in the rotating groove. The mounting platform is assembled with an assembly block, on which a rotating shaft is mounted. One end of the rotating shaft connects to a gear. The other end of the rotating shaft connects to a first assembly rod, to which a second assembly rod is connected. The second assembly rod connects to a fixed block, which is connected to an energy storage box. A motor base is mounted on the casing. A motor is mounted on the motor base.Type: ApplicationFiled: August 15, 2023Publication date: March 6, 2025Applicant: CSG PWR GEN (GUANGDONG) ENERGY STOR TECH CO., LTDInventors: Zhiqiang WANG, Chao DONG, Bangjin LIU, Sheng WAN, Jin WANG, Di XIAO, Jiasheng WU, Man CHEN, Yumin PENG, Yueli ZHOU, Cheng PENG, Min ZHANG, Bin WU, Linwei WANG, Qihua LIN, Xiaodong ZHENG, Zheng WENG, Shaohua ZHAO, Lunsen ZOU
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Publication number: 20250079769Abstract: Disclosed is a ground wire spacer structure of a connector, comprising two groups of connector monoblocks that are symmetrical and spliced, wherein any group of the connector monoblocks comprise a housing provided with: a plurality of groups of elastic pieces, wherein one end of the elastic piece is connected to a female socket of the connector, and the other end of the elastic piece is connected to a wire group of the connector; a plurality of metal spacers distributed between two adjacent groups of the elastic pieces and used to separate the elastic pieces; and a conductive sheet mounted on the housing, wherein the conductive sheet is abutted against the plurality of spacers, the conductive sheet is connected to a ground wire in the wire group, and the metal spacers and the conductive sheet form a plurality of independent spaces for accommodating the elastic pieces respectively.Type: ApplicationFiled: December 29, 2023Publication date: March 6, 2025Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang, Zhaoyang Tang, Di Jiang, Mingliang Xia, Junzhong Liu
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Publication number: 20250079734Abstract: The utility model discloses a small-sized connector convenient for dismounting and mounting, the connector being inserted and received in a female socket of a PCB board, comprising: a connector housing inserted and received in the female socket; two elastic clamping plates, wherein the two elastic clamping plates are symmetrically mounted on both sides of the connector housing, first ends of the two elastic clamping plates are each provided with a clamping hole, and the female socket is provided with a clamping boss clamped with the clamping hole; and a pull strap, wherein both ends of the pull strap are respectively connected to second ends of the two elastic clamping plates, and the pull strap is used to pull the second ends of the two elastic clamping plates to separate the clamping holes at the first ends of the two elastic clamping plates from the clamping bosses of the female socket.Type: ApplicationFiled: December 29, 2023Publication date: March 6, 2025Inventors: Xiling He, Huilin Wu, Jijian Wei, Haiqiu Lu, Xiao'an Wang, Xiaobin Wang, Jun Yang, Zhaoyang Tang, Di Jiang, Mingliang Xia, Junzhong Liu
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Publication number: 20250077717Abstract: A radio frequency (RF) tamper detector of an electronic device can offer improved chassis intrusion monitoring to protect the device from software and hardware-based tampering. The tamper detector can monitor RF noise levels in a first frequency band and in a second frequency band to calculate an RF noise level moving average for each frequency band. If the moving averages in both frequency bands exceed a RF noise threshold, the tamper detector can set a cover removal flag to indicate that a cover of the device housing has been removed. The tamper detector can cause the electronic device to lock or disable a system BIOS when cover removal is detected. Additionally, the electronic device can notify remote monitoring systems (e.g., operated by an IT administrator or warranty support center) to receive additional instructions to secure the device.Type: ApplicationFiled: September 6, 2023Publication date: March 6, 2025Applicant: Hewlett-Packard Development Company, L.P.Inventors: Xin-Chang Chen, He-Di Liu, Hsin-Chih Lin, Ming Hsuan Hsieh
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Patent number: 12242389Abstract: An application-level memory control group of a first application may be created when the first application is opened. An anonymous page of the first application is added to a least recently used linked list of the application-level memory control group, and a file page of the first application is added to a global least recently used linked list. An application-level memory control group is created in a dimension of an application, and an anonymous page of the application is managed in a refined manner. In addition, a file page of the application-level memory control group may be managed based on a global least recently used linked list.Type: GrantFiled: October 26, 2021Date of Patent: March 4, 2025Assignee: HUAWEI DEVICE CO., LTD.Inventors: Wei Han, Chang Xie, Qinxu Pan, Jian Chen, Qiang Gao, Song Liu, Jinxuan Fang, Yuanfeng Hu, Xiangbing Tang, Weilai Zhou, Cai Sun, Zuoyu Wu, Qing Xia, Wei Du, Biao He, Fa Wang, Chengke Wang, Ziyue Luo, Zongfeng Li, Xu Wang, Xiyu Zhou, Yu Liu, Tao Li, Long Jin, Di Fang
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Patent number: 12244376Abstract: Embodiments of the present disclosure relate to device, method, device and computer readable storage media of beam-forming scheme in higher rank transmission for massive multiple input multiple output system. The method comprises determining a target beam for carrying a transmission of a reference signal from the base station to the user equipment; determining a target arrangement of the plurality of ports formed at an antenna array of the base station; and transmitting, to the user equipment, different portions of the target beam through a plurality of ports based on the target arrangement. In this way, a new beamforming method when Massive-MIMO choose higher rank transmission in multi ports communication system is proposed. The gNB would only select the best beam with different halves in the same polarization to keep the QCL principles.Type: GrantFiled: September 1, 2020Date of Patent: March 4, 2025Assignee: NOKIA SOLUTIONS AND NETWORKS OYInventors: Di Liu, Chao Han, Pengpeng Song, Lili Wang
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Patent number: D1065733Type: GrantFiled: September 5, 2023Date of Patent: March 4, 2025Assignee: Beijing TimeRiver Technology Co., Ltd.Inventors: Huayang Xu, Hui Zhu, Hailiang Niu, Hailong Liu, Di Wu, Yanyu Liu