Abstract: A method of handling radar signals of a radar system having a plurality of antennas is provided. The method may include generating a plurality of time-based radar signals based on a radar signal received by an associated antenna of the plurality of antennas, and transforming each time-based radar signal of the time-based radar signals into radar signals that each comprise a plurality of pairs of a frequency-based-value and an associated intensity value.

Abstract: A device for processing radar signals is suggested, said device comprising a DMA engine, a buffer and a processing stage, wherein the DMA engine is arranged for conducting a read access to a memory, wherein such read access comprises at least two data entries, and for filling the buffer by resorting the at least two data entries, wherein the processing stage is arranged for processing the data stored in the buffer.

Abstract: The present disclosure relates to a radar device including a first radar-IC for processing first receive signals from first antennas of an antenna array, wherein the first radar-IC is configured to determine a first range-Doppler map based on the first receive signals, and to determine a first subregion of the first range-Doppler map based on criteria of interest. The radar device also includes at least a second radar-IC for processing second receive signals from second antennas of the antenna array, wherein the second radar-IC is configured to determine a second range-Doppler map based on the second receive signals, and to determine a second subregion of the second range-Doppler map based on the criteria of interest. A data interface is configured to forward information indicative of the first and/or the second subregions to a common processor for further processing.

Abstract: A radar device comprises a data communication input interface configured to receive a data clock signal for a data bus and an analog to digital converter configured to sample a signal at time instants given by a sampling clock signal. In an implementation, a sampling clock generation circuit is configured to generate the sampling clock signal based on the data clock signal.

Abstract: A radar device is disclosed that includes an input DMA module, at least one processing module, a histogram module, and an output DMA module. The input DMA module is configured to access a memory and supply data from the memory to the at least one processing module and/or to the histogram module. Each of the processing modules is configured to be enabled or disabled, wherein the at least one processing module that is enabled is configured to process at least a portion of the data supplied by the input DMA module, wherein the histogram module is fed by data from the at least processing module that is enabled and/or by the input DMA module. The output DMA module is configured to store the data that are processed by the at least one processing module that is enabled in the memory. Also, an according method is provided.

Abstract: According to an example, a device for processing data is suggested, said device comprising a first component, wherein the first software component is arranged for receiving the data; a security processor for receiving said data and a first signature, wherein the security processor is arranged for determining based on the first signature whether the data are valid; for determining a second signature for the data; and for conveying the second signature to the first component.

Abstract: An example relates to a method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results without a second group of the FFT results.

Abstract: A radar device comprises a data communication input interface configured to receive a data clock signal for a data bus and an analog to digital converter configured to sample a signal at time instants given by a sampling clock signal. In an implementation, a sampling clock generation circuit is configured to generate the sampling clock signal based on the data clock signal.

Abstract: A method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results, wherein the first group of FFT results comprises at least two portions, wherein a first portion of FFT results is stored with a first accuracy and a second portion of FFT results is stored with a second accuracy.

Abstract: A radar sensor is described herein. In accordance with one example embodiment the radar sensor includes a transmitter for transmitting an RF signal and a receiver configured to receive a respective back-scattered signal from at least one radar target and to provide a corresponding digital radar signal. The radar sensor further includes a processor configured to convert the digital radar signal into the frequency do-main thus providing respective frequency domain data and to compress the frequency domain data. A communication interface is configured to transmit the compressed frequency domain data via a communication link operably coupled to the communication interface. Furthermore, respective and related radar methods and systems are described.

Abstract: An embodiment relates to a method for processing data that includes (a) calculating a second identifier based on input data, (b) conducting a first operation comparing the second identifier with a first identifier, and (c) conducting a second operation comparing the second identifier with a modified first identifier.

Abstract: A controller for controlling a multi-phase motor is described. The controller may be configured to drive a first virtual multi-phase motor in an active mode and drive a second virtual multi-phase motor in a passive mode. In the active mode, at least a portion of a reference torque is distributed to the first virtual multi-phase motor. In the passive mode, zero torque is distributed to the second virtual multi-phase motor.

Abstract: A controller for controlling a multi-phase motor is described. The controller may include a torque control module and a current control module. The current control module may be configured to receive a reference current from the torque control module, determine a reference voltage, determine a flux correction value based on the reference voltage, a maximum available voltage, and a speed of the multi-phase motor, and output the flux correction value. The torque control module may be configured to receive the flux correction value and update the reference current based on the flux correction value.

Abstract: A controller for controlling a multi-phase motor is described. The controller may be configured to drive a first virtual multi-phase motor in an active mode and drive a second virtual multi-phase motor in a passive mode. In the active mode, at least a portion of a reference torque is distributed to the first virtual multi-phase motor. In the passive mode, zero torque is distributed to the second virtual multi-phase motor.

Abstract: A controller for controlling a multi-phase motor is described. The controller may include a torque control module and a current control module. The current control module may be configured to receive a reference current from the torque control module, determine a reference voltage, determine a flux correction value based on the reference voltage, a maximum available voltage, and a speed of the multi-phase motor, and output the flux correction value. The torque control module may be configured to receive the flux correction value and update the reference current based on the flux correction value.

Abstract: A device for processing radar signals is suggested, said device comprising a DMA engine, a buffer and a processing stage, wherein the DMA engine is arranged for conducting a read access to a memory, wherein such read access comprises at least two data entries, and for filling the buffer by resorting the at least two data entries, wherein the processing stage is arranged for processing the data stored in the buffer.

Abstract: A method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results, wherein the first group of FFT results comprises at least two portions, wherein a first portion of FFT results is stored with a first accuracy and a second portion of FFT results is stored with a second accuracy.

Abstract: An example relates to a method for processing radar signals, wherein said radar signals comprise digitized data received by at least one radar antenna, the method comprising (i) determining FFT results based on the digitized data received; and (ii) storing a first group of the FFT results without a second group of the FFT results.

Abstract: An embodiment relates to a method for processing data that includes (a) calculating a second identifier based on input data, (b) conducting a first operation comparing the second identifier with a first identifier, and (c) conducting a second operation comparing the second identifier with a modified first identifier.

Abstract: According to an example, a device for processing data is suggested, said device comprising a first component, wherein the first software component is arranged for receiving the data; a security processor for receiving said data and a first signature, wherein the security processor is arranged for determining based on the first signature whether the data are valid; for determining a second signature for the data; and for conveying the second signature to the first component.