Abstract: A non-volatile storage subsystem comprises a media I/O controller, a media access channel, and movable storage media. A non-volatile disk storage subsystem bas a read channel coupling a disk controller to a disk head assembly. A read channel interfacing subsystem is provided as part of the storage subsystem, and the read channel interfacing subsystem interfaces a disk controller to the read channel. The read channel interfacing subsystem comprises a set of process units and a pipeline manager.

Abstract: An n-stage pipelined combined encoder and syndrome generator system includes n stages that are essentially identical. Each of the stages includes two associated delay circuits, namely, a first delay circuit in a chain of feedback adders that operate as a feedback path during encoding, and a second delay circuit in a data input line. During encoding operations, the delay circuits in the feedback adder chain segment the chain of j feedback adders into n stages of j/n adders, and the delay circuits in the data input line delay the data symbols by the latencies associated with the respective stages. The delay circuits thus simultaneously provide to the various stages the corresponding data symbols and propagating sums. After the last data symbol is encoded, the ECC symbols are available after a time lag associated with the j/n adders in the last stage.

Abstract: A system for producing a quotient B/A, where A and B are elements of GF(22M), 2M+1 is prime and 2 is a primitive element of GF(2M+1), first determines A−1 and then multiplies B by A−1. The system uses a (2M+1)-bit representation for A and produces, directly from A, an element C=A2M+1, where C also is an element of GF(22M) which is a subfield of GF(2M). The system produces M+1 bits to represent C by performing bit manipulations that are equivalent to permuting the (2M+1)-bits to produce A2M and multiplying the permuted bits by A. The bit manipulations are: c0=&Sgr;aiai; c1=&Sgr;aiai+1 . . . cM=&Sgr;aiai+M where the aj's and cj's are the coefficients of A and C, respectively. The system retrieves C−1 from a (2M−1)-element lookup table and multiplies C−1=A−2M+1 by A2M to produce A−1.

Abstract: A method of data transfer in a data processing system having at least one source buffer and at least one destination buffer. The source buffer includes a plurality of data blocks, each data block having an address and being for storage of data including an identifier uniquely identifying that data block. The destination buffer includes a plurality of data blocks corresponding to the data blocks of the source buffer, each destination block having an address and being for storage of data. Each source block identifier is a function of a corresponding destination block address.

Abstract: A Galois field multiplier for GF(2.sup.n), with n=2m, multiplies two n-bit polynomials to produce a(x)*b(x)=a(x)b(x) mod g(x), where g(x) is a generator polynomial for the Galois field and "*" represents multiplication over the Galois field, by treating each polynomial as the sum of two m-bit polynomials:a(x)=a.sub.H (x)x.sup.m +a.sub.L (x) and b(x)=b.sub.H (x)x.sup.m +b.sub.L (x),witha.sub.H (x)x.sup.m =[a.sub.n-1 x.sup.(n-1)-m +a.sub.n-2 x.sup.(n-2)-m + . . . +a.sub.m+1 x.sup.(m+1)-m +a.sub.m ]x.sup.ma.sub.L (x)=a.sub.m-1 x.sup.m-1 +a.sub.m-2 x.sup.m-2 + . . . +a.sub.2 x.sup.2 +a.sub.1 x+a.sub.0and b.sub.H and b.sub.L having corresponding terms. Multiplying the two polynomials then becomes:a(x)*b(x)=(a.sub.H (x)x.sup.m +a.sub.L (x))*(b.sub.H (x)x.sup.m +b.sub.L (x))=[(a.sub.H (x)b(x).sub.H)x.sup.m mod g(x)+(b.sub.H (x)a.sub.L (x)+a.sub.L (x)b.sub.L (x))]x.sup.m mod g(x)+a.sub.L (x)b.sub.L (x).The Galois field multiplier produces four degree-(n-2) polynomial products, namely, a.sub.H (x)b.sub.H (x)=V.sub.

Abstract: A Reed-Solomon error-correction coding (ECC) scheme selectively supports two different-length codes to optimize the trade-off between error performance and the amount of disk space required to store protection symbols. The encoder contains two sets of alpha multipliers; part of one set is multiplexed with the other depending on which code is being used. Also, a shift register within the encoder is selectively lengthened or shortened depending on the code. The code pair is selected so that the generator polynomial of the shorter code is a complete divisor of the generator polynomial of the longer code. Thus, one code is a sub-code of the other. Accordingly, the ECC system is able to use the same syndrome calculator for each code. The error-correction decoder uses those syndromes that correspond to the roots of the generator polynomial of the code being used.

Abstract: An encoder in a data processing system generates, from a single m-bit coset leader constant, or symbol, a coset leader, which is a series of k m-bit symbols that resembles a random sequence of km bits. The encoder encodes the m-bit initial coset leader constant in a linear feedback shift register that is characterized by a maximum length polynomial over GF(2). The constants are produced by the register at the same times as the error correction symbols are produced by the encoder. The corresponding constants and symbols are then XOR'd together before the symbols are concatenated with the data symbols to form a code word for recording. A decoder similarly generates the coset leader from the initial constant. The decoder XOR's these constants with the error correction symbols in a retrieved code word as part of a demodulation operation.