Patents by Inventor Diane Delgado

Diane Delgado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10248623
    Abstract: Described are techniques for processing data. Hash values for the data portions of a logical device are determined. Each data portion has a corresponding one of the hash values. It is determined whether a first of the hash values associated with a first of the data portions is equal to a hash value of an implied data value. If the first hash value is equal to the hash value of the implied data value, first processing is performed including determining whether the first data portion has a current data value equal to the implied data value, and responsive to determining that the first data portion has a current data value equal to the implied data value, performing second processing including updating first metadata for the first data portion to denote that the first data portion has the implied data value. The first data portion is not associated with allocated storage.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: April 2, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, William C. Davenport, Diane Delgado
  • Patent number: 7239581
    Abstract: In a multiprocessor system that includes a plurality of processor modules, each one of which includes its own internal clock, one of the plurality of processor modules is designated as a master processor module having a master internal clock. Each other processor module is designated as a slave processor module having a slave processor module internal clock. Each slave processor module synchronizes its internal clock with the master internal clock.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: July 3, 2007
    Assignee: Symantec Operating Corporation
    Inventors: Diane Delgado, Jeff Darcy
  • Publication number: 20060047989
    Abstract: In a multiprocessor system that includes a plurality of processor modules, each one of which includes its own internal clock, one of the plurality of processor modules is designated as a master processor module having a master internal clock. Each other processor module is designated as a slave processor module having a slave processor module internal clock. Each slave processor module synchronizes its internal clock with the master internal clock.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 2, 2006
    Inventors: Diane Delgado, Jeff Darcy