Abstract: A method for filling features in a layer over a substrate is provided. A dispersion of nanoparticles less than 5 nm is placed on the layer. The liquid is frozen by lowering a temperature of the liquid. The frozen liquid is sublimated by decreasing pressure and subsequently heating the frozen liquid, wherein the nanoparticles are not sublimated.

Abstract: Methods, systems, and computer programs are presented for processing a substrate in a processing chamber which includes a first chamber and a second chamber. A first surface of the substrate is exposed to the first chamber and a second surface of the substrate is exposed to the second chamber. One method includes an operation for applying a first fluid to the first surface of the substrate, where the first fluid is at a first temperature. Further, the method includes another operation for applying a second fluid to the second surface of the substrate, where the second fluid is at a second temperature. During processing of the substrate, the second temperature is higher than the first temperature, and the second fluid heats the substrate.

Abstract: Methods, systems, and computer programs are presented for processing a substrate in a processing chamber which includes a first chamber and a second chamber. A first surface of the substrate is exposed to the first chamber and a second surface of the substrate is exposed to the second chamber. One method includes an operation for applying a first fluid to the first surface of the substrate, where the first fluid is at a first temperature. Further, the method includes another operation for applying a second fluid to the second surface of the substrate, where the second fluid is at a second temperature. During processing of the substrate, the second temperature is higher than the first temperature, and the second fluid heats the substrate.

Abstract: In one of the many embodiments, an apparatus for processing a substrate is provided which includes a substrate processing chamber where the substrate is positioned within the substrate processing chamber so the substrate at least partially separates the substrate processing chamber into a first chamber and a second chamber. The apparatus further includes a first chamber inlet configured to input a first fluid of a first temperature into the first chamber at a first pressure and a second chamber inlet configured to input a second fluid of a second temperature into the second chamber at a second pressure wherein the first pressure and the second pressure are substantially equal. The second temperature is capable of being utilized to manage substrate temperature.

Abstract: A method for making semiconductor interconnect features in a dielectric layer is provided. The method includes depositing a copper seed layer over a barrier layer that is formed over the dielectric layer and into etched features of the dielectric layer. The copper seed layer is then treated to remove an oxidized layer from over the copper seed layer. The method then moves to electroplating a copper fill layer over the treated copper seed layer. The copper fill layer is configured to fill the etched features of the dielectric layer.

Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and a fluoride compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.

Abstract: A method for fabricating a pad, a belt, or other polishing surface for use in chemical mechanical planarization (CMP) system is provided. The method includes providing a supporting mesh, a first polymeric material over the supporting mesh and a second material such that the mesh is encased between the first polymeric material and the second material. The first polymeric material, the supporting mesh, and the second material are then bonded together.

Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and a fluoride compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.

Abstract: A processing belt for use in chemical mechanical planarization (CMP), and methods for making the same, is provided. Embodiments of the processing belt include a mesh belt, and a polymeric material encasing the mesh belt to define the processing belt. The processing belt is fabricated so that the mesh belt forms a continuous loop within the polymeric material, and the mesh belt is constructed as a grid of intersecting members. The intersecting members are joined at fixed joints to form a rigid support structure for the processing belt.

Abstract: A processing belt for use in chemical mechanical planarization (CMP), and methods for making the same, are provided. Embodiments of the processing belt include a polymeric material reinforced with a woven fabric or synthetic material encased between the polymeric material and an additional polymeric material layer to define the processing belt. The processing belt is fabricated so that the woven fabric forms a continuous loop and is positioned against a surface of the polymeric material. The additional polymeric material layer is applied over the woven fabric, permeating the woven fabric to bond to the polymeric material forming an integral structure of woven fabric reinforced polymeric material.

Abstract: A processing belt for use in chemical mechanical planarization (CMP), and methods for making the same, is provided. Embodiments of the processing belt include a mesh belt, and a polymeric material encasing the mesh belt to define the processing belt. The processing belt is fabricated so that the mesh belt forms a continuous loop within the polymeric material, and the mesh belt is constructed as a grid of intersecting members. The intersecting members are joined at fixed joints to form a rigid support structure for the processing belt.

Abstract: A method is described comprising removing an oxide from a surface and then commencing application of a passivation layer to the surface within 5 seconds of the oxide removal. The surface may be a copper surface which may further comprise a bonding pad surface. Removing the oxide may further comprise applying a solution comprising citric acid or hydrochloric acid. Applying the passivation layer may further comprise applying a solution comprising a member of the azole family where the azole family member may further comprise BTA. The method may also further comprise completely applying the passivation layer 35 seconds after commencing its application.

Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and an ammonium compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.

Abstract: A method for making semiconductor interconnect features in a dielectric layer is provided. The method includes depositing a copper seed layer over a barrier layer that is formed over the dielectric layer and into etched features of the dielectric layer. The copper seed layer is then treated to remove an oxidized layer from over the copper seed layer. The method then moves to electroplating a copper fill layer over the treated copper seed layer. The copper fill layer is configured to fill the etched features of the dielectric layer.

Abstract: A cleaning solution for cleaning a semiconductor substrate is formed by mixing an amount of citric acid, an amount of ammonium fluoride, and an amount of hydrogen fluoride in deionized water. In one embodiment, the amount of citric acid is in a range from about 0.09% by weight to about 0.11% by weight, the amount of ammonium fluoride is in a range from about 0.4% by weight to about 0.6% by weight, the amount of hydrogen fluoride is in a range from about 0.09% by weight to about 0.11% by weight, and the cleaning solution has a pH of about 4. A method for cleaning a semiconductor substrate having a polished copper layer in which a concentrated cleaning solution is mixed with deionized water proximate to a scrubbing apparatus also is described.

Abstract: A method for making semiconductor interconnect features in a dielectric layer is provided. The method includes depositing a copper seed layer over a barrier layer that is formed over the dielectric layer and into etched features of the dielectric layer. The copper seed layer is then treated to remove an oxidized layer from over the copper seed layer. The method then moves to electroplating a copper fill layer over the treated copper seed layer. The copper fill layer is configured to fill the etched features of the dielectric layer.

Abstract: A cleaning solution for cleaning a semiconductor substrate is formed by mixing an amount of citric acid and an amount of ammonia in deionized water. In one embodiment, the amount of citric acid is in a range from about 0.18% by weight to about 0.22% by weight and the amount of ammonia is in a range from about 0.0225% by weight to about 0.0275% by weight, and the cleaning solution has a pH of about 4. A method for cleaning a semiconductor substrate having a polished copper layer in which a concentrated cleaning solution is mixed with deionized water proximate to a scrubbing apparatus also is described.

Abstract: A method for making semiconductor interconnect features in a dielectric layer is provided. The method includes depositing a copper seed layer over a barrier layer that is formed over the dielectric layer and into etched features of the dielectric layer. The copper seed layer is then treated to remove an oxidized layer from over the copper seed layer. The method then moves to electroplating a copper fill layer over the treated copper seed layer. The copper fill layer is configured to fill the etched features of the dielectric layer.

Abstract: A method is described comprising removing an oxide from a surface and then commencing application of a passivation layer to the surface within 5 seconds of the oxide removal. The surface may be a copper surface which may further comprise a bonding pad surface. Removing the oxide may further comprise applying a solution comprising citric acid or hydrochloric acid. Applying the passivation layer may further comprise applying a solution comprising a member of the azole family where the azole family member may further comprise BTA. The method may also further comprise completely applying the passivation layer 35 seconds after commencing its application.

Abstract: A method is described comprising removing an oxide from a surface and then commencing application of a passivation layer to the surface within 5 seconds of the oxide removal. The surface may be a copper surface which may further comprise a bonding pad surface. Removing the oxide may further comprise applying a solution comprising citric acid or hydrochloric acid. Applying the passivation layer may further comprise applying a solution comprising a member of the azole family where the azole family member may further comprise BTA. The method may also further comprise completely applying the passivation layer 35 seconds after commencing its application.