Patents by Inventor Dibyajat Mishra

Dibyajat Mishra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145363
    Abstract: In examples, a semiconductor package comprises a semiconductor die having a device side comprising circuitry formed therein; a passivation layer abutting the device side; first and second horizontal metal members coupled to the device side by way of vias extending through the passivation layer, the first and second horizontal metal members having thicknesses ranging from 4 microns to 25 microns; first and second metal posts coupled to and vertically aligned with the first and second metal members, respectively, the first and second metal posts having vertical thicknesses ranging from 10 microns to 80 microns; first and second solder bumps coupled to the first and second metal posts, respectively; and a ball grid array (BGA) substrate coupled to the first and second solder bumps.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Vivek SRIDHARAN, Yiqi TANG, Blake TRAVIS, Dibyajat MISHRA, Deepa KOTE
  • Publication number: 20240038691
    Abstract: In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Vijaylaxmi Gumaste Khanolkar, Anindya Poddar, Hassan Omar Ali, Dibyajat Mishra, Venkatesh Srinivasan, Swaminathan Sankaran
  • Patent number: 11450638
    Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: September 20, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
  • Publication number: 20200402938
    Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.
    Type: Application
    Filed: September 1, 2020
    Publication date: December 24, 2020
    Inventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
  • Patent number: 10763231
    Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: September 1, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
  • Publication number: 20200235067
    Abstract: A packaged electronic device includes a multilayer substrate, including a first side, a first layer having a first plurality of conductive structures along the first side, and a second layer having a second plurality of conductive structures, a semiconductor die soldered to a first set of the conductive structures, a conductive clip directly connected to one of the conductive structures of the first layer and to a second side of the semiconductor die, and a package structure that encloses the semiconductor die and a portion of the conductive clip.
    Type: Application
    Filed: January 22, 2019
    Publication date: July 23, 2020
    Applicant: Texas Instruments Incorporated
    Inventors: Woochan Kim, Dibyajat Mishra, Kurt Sincerbox, Vivek Arora
  • Publication number: 20200135632
    Abstract: In a described example, an apparatus includes a substrate with a first surface and an opposing second surface. The substrate includes a trench extending into the substrate from the first surface, a die mounting area adjacent to the trench, a first plurality of leads, and a second plurality of leads. The second plurality of leads are spaced from the trench to electrically isolate the second plurality of leads. The apparatus further includes a first mold compound in the trench forming a filled trench and in the space between the trench and the second plurality of leads. A first die is attached to the first surface of the substrate and a second die is attached to a surface of the first mold compound in the filled trench.
    Type: Application
    Filed: October 24, 2018
    Publication date: April 30, 2020
    Inventors: Dibyajat Mishra, Vivek Arora, Ashok Prabhu, Ken Pham
  • Publication number: 20200035633
    Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.
    Type: Application
    Filed: July 27, 2018
    Publication date: January 30, 2020
    Applicant: Texas Instruments Incorporated
    Inventors: Dibyajat Mishra, Ashok Prabhu, Tomoko Noguchi, Luu Thanh Nguyen, Anindya Poddar, Makoto Yoshino, Hau Nguyen
  • Publication number: 20140347157
    Abstract: Exemplary embodiments provide a nanomagnetic structure and method of making the same, comprising a device substrate, a plurality of nanomagnetic composite layers disposed on the device substrate, wherein an adhesive layer is interposed between each of the plurality of nanomagnetic composite layers. Metal windings are integrated within the plurality of nanomagnetic composite layers to form an inductor core, wherein the nanomagnetic structure has a thickness ranging from about 5 to about 100 microns.
    Type: Application
    Filed: August 16, 2012
    Publication date: November 27, 2014
    Inventors: Markondeya Raj Pulugurtha, Rao R. Tummala, Venkatesh Sundaram, Nitesh Kumbhat, Uppili Sridhar, Joseph Ellul, Dibyajat Mishra