Abstract: Two-wire signal transmitter and method in which a very low-level Alternating Circuit (AC) input signal sensed at a remote circuit at a first end of a signal path is added to a low-level Direct Current (DC) bias signal provided by a local circuit that is located at a second end of the signal path. In a preferred embodiment, the remote circuit is electrically coupled to and powered by the local circuit through a two-wire path interconnection, typically a shielded twisted-pair cable. The DC bias signal has sufficient level to overcome minimum ratings of electrical contacts, thereby to pass the sensed very low-level AC input signal reliably through the poor electrical contacts that are used, for instance, for connecting electronic circuits that run the length of a railway train.

Abstract: A vital inverter driver includes an oscillator which, upon energization, outputs a signal of predetermined frequency to two identical parallel-arranged counter circuits, which step down the oscillator output to the desired frequency. One counter output is fed to an inverting amplifier, while the other is coupled to a noninverting amplifier, thereby resulting in output count signals of identical frequency and amplitude but being 180.degree. out of phase. A summing circuit, having two series-resistance arrangements with different resistance values for weighting purposes, and a summing transformer passes a signal of a predetermined magnitude through an overload protection device which could be a fuse or a breaker, when the output count signals are 180.degree. out of phase. When the count signals are other than 180.degree.

Abstract: A fail-safe voltage-limiting circuit for an audio frequency-controlled railway track circuit includes a pair of NPN transistors arranged in the manner of a darlington pair, wherein the base connector of the first transistor receives an amplitude-modulated signal from a filter and detector circuit connected to the rails. A first pair of resistors arranged in series between the positive and negative system battery lines, includes a first fail-safe resistors also connected to the collector of the first transistor. The ratio of the first and second resistors are selected to limit the positive excursion of the input signal, thus clipping excess noise at this limit. A second pair of resistors is coupled to the second transistor to limit the negative excursion of the amplitude-modulated input signal. The second pair of resistors includes a second fail-safe resistor connected to the emitter of the second transistor and a third resistor connected in series to the second fail-safe resistor at this junction as well.

Abstract: First and second monitoring channel apparatus detect the level of the normal output and load current, respectively, supplied by a principal energy source to a variable load network. Source output varies from normal to low level and load current from low to high level as load network varies between relatively no load and heavy load conditions. The monitor channel detection signals are checked through a logic circuit so that if at least one exceeds a predetermined level indicating the operable condition of the principal source, a registry device is actuated to hold the energy supply leads to the load network connected to the principal source. If neither monitor detects an operable condition of the source, the registry device is operated to activate, and transfer the load energy supply leads to, a standby source.

Abstract: A fail-safe time delay circuit comprising a detection relay for sensing the presence and absence of an input signal, a switching relay for assuming a first and a second condition in accordance with the presence and absence of the input signal, and a programmable unijunction transistor oscillating circuit, a silicon controlled rectifier gating circuit and a d.c. making circuit including a solid-state Colpitts oscillator and half-wave rectifier controlled by the second condition of the switching relay for providing a predetermined time delay period between the disappearance and the reappearance of the input signal prior to permitting the switching relay reassume its first condition.