Patents by Inventor Didier Campos

Didier Campos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230081711
    Abstract: A wire bonding tool includes a tool body with a tubular cavity extending through the tool body and a distal end. The distal end includes a flared opening at an end of the tubular cavity. The tool body further includes at least one protrusion at a level of the distal end.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 16, 2023
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Didier CAMPOS, Fabien QUERCIA, Justin CATANIA
  • Publication number: 20220384298
    Abstract: A support substrate has a mounting face with a metal heat transfer layer. Holes are provided to extend at least partially through the metal heat transfer layer. Metal heat transfer elements are disposed in the holes of the metal heat transfer layer of the support substrate. An electronic integrated circuit (IC) chip has a rear face that is fixed to the mounting face of the support substrate via a layer of adhesive material. The metal heat transfer elements disposed in the holes of the metal layer of the support substrate extend to protrude, relative to the mounting face of the support substrate, into the layer of adhesive material.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 1, 2022
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Patent number: 11488884
    Abstract: A support substrate has a mounting face with a metal heat transfer layer. Holes are provided to extend at least partially through the metal heat transfer layer. Metal heat transfer elements are disposed in the holes of the metal heat transfer layer of the support substrate. An electronic integrated circuit (IC) chip has a rear face that is fixed to the mounting face of the support substrate via a layer of adhesive material. The metal heat transfer elements disposed in the holes of the metal layer of the support substrate extend to protrude, relative to the mounting face of the support substrate, into the layer of adhesive material.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 1, 2022
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier Campos
  • Publication number: 20220238492
    Abstract: The disclosure concerns an electronic device and methods of making an electronic device. The electronic device includes a circuit that is at least partially formed in an active region of a substrate. An electronic package is stacked on the substrate. A via extends through the circuit from the active region of the substrate to a surface of the substrate that is opposite the active region. At least one contacting element connects the via to the electronic package.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Patent number: 11355851
    Abstract: A first independent unit includes a support substrate with an integrated network of electrical connections. An electronic integrated circuit chip is mounted above a front face of the support substrate. A second independent unit includes a dielectric support. The second independent unit is stacked above the first independent unit on a side of the front face of the first independent unit. An electromagnetic antenna includes an exciter element and a resonator element. The exciter element provided at the support substrate. The resonator element is provided at the dielectric support.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: June 7, 2022
    Assignees: STMicroelectronics SA, STMicroelectronics (Grenoble 2) SAS
    Inventors: Frederic Gianesello, Didier Campos
  • Patent number: 11302672
    Abstract: The disclosure concerns an electronic device and methods of making an electronic device. The electronic device includes a circuit that is at least partially formed in an active region of a substrate. An electronic package is stacked on the substrate. A via extends through the circuit from the active region of the substrate to a surface of the substrate that is opposite the active region. At least one contacting element connects the via to the electronic package.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: April 12, 2022
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier Campos
  • Patent number: 11107742
    Abstract: An electronic device includes a carrier wafer having a front side and a back side, with an electrical connection network configured to connect the front side to the back side. An electronic chip is mounted on the front side of the carrier wafer and electrically connected to front pads of the electrical connection network. A sheet of a thermally conductive graphite or a pyrolytic graphite is added to the back side of the carrier wafer. The sheet includes apertures which leave back pads of the electrical connection network uncovered.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: August 31, 2021
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier Campos
  • Publication number: 20200381328
    Abstract: A support substrate has a mounting face with a metal heat transfer layer. Holes are provided to extend at least partially through the metal heat transfer layer. Metal heat transfer elements are disposed in the holes of the metal heat transfer layer of the support substrate. An electronic integrated circuit (IC) chip has a rear face that is fixed to the mounting face of the support substrate via a layer of adhesive material. The metal heat transfer elements disposed in the holes of the metal layer of the support substrate extend to protrude, relative to the mounting face of the support substrate, into the layer of adhesive material.
    Type: Application
    Filed: June 1, 2020
    Publication date: December 3, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Publication number: 20200381833
    Abstract: A first independent unit includes a support substrate with an integrated network of electrical connections. An electronic integrated circuit chip is mounted above a front face of the support substrate. A second independent unit includes a dielectric support. The second independent unit is stacked above the first independent unit on a side of the front face of the first independent unit. An electromagnetic antenna includes an exciter element and a resonator element. The exciter element provided at the support substrate. The resonator element is provided at the dielectric support.
    Type: Application
    Filed: June 1, 2020
    Publication date: December 3, 2020
    Applicants: STMicroelectronics SA, STMicroelectronics (Grenoble 2) SAS
    Inventors: Frederic GIANESELLO, Didier CAMPOS
  • Publication number: 20200303348
    Abstract: The disclosure concerns an electronic device and methods of making an electronic device. The electronic device includes a circuit that is at least partially formed in an active region of a substrate. An electronic package is stacked on the substrate. A via extends through the circuit from the active region of the substrate to a surface of the substrate that is opposite the active region. At least one contacting element connects the via to the electronic package.
    Type: Application
    Filed: March 13, 2020
    Publication date: September 24, 2020
    Inventor: Didier CAMPOS
  • Publication number: 20200152586
    Abstract: A carrier substrate includes an integrated network of electrical connections extending from a front face to a back face. An electromagnetic antenna is located on the front face of the carrier substrate and is connected to the integrated network. An electronic chip is mounted over the front face of the carrier substrate, and connected to the integrated network, at a location offset from the antenna. An encapsulation layer encapsulates the electronic chip. The encapsulation layer includes, recessed with respect to its front surface, a local void that is located laterally away from the electronic chip and extends over a zone that at least partly covers the location of the electromagnetic antenna.
    Type: Application
    Filed: November 11, 2019
    Publication date: May 14, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Publication number: 20190287874
    Abstract: An electronic device includes a carrier wafer having a front side and a back side, with an electrical connection network configured to connect the front side to the back side. An electronic chip is mounted on the front side of the carrier wafer and electrically connected to front pads of the electrical connection network. A sheet of a thermally conductive graphite or a pyrolytic graphite is added to the back side of the carrier wafer. The sheet includes apertures which leave back pads of the electrical connection network uncovered.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 19, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Patent number: 9870947
    Abstract: Electronic devices are manufactured using a collective (wafer-scale) fabrication process. Electronic chips are mounted onto one face of a collective substrate wafer. A collective flexible sheet made of a heat-conductive material comprising a layer containing pyrolytic graphite is fixed to extend over a collective region extending over the electronic chips and over the collective substrate wafer between the electronic chips. The collective flexible sheet is then compressed. A dicing operation is then carried out in order to obtain electronic devices each including an electronic chip, a portion of the collective plate and a portion of the collective flexible sheet.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: January 16, 2018
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics SA, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Didier Campos, Benoit Besancon, Perceval Coudrain, Jean-Philippe Colonna
  • Publication number: 20180005889
    Abstract: Electronic devices are manufactured using a collective (wafer-scale) fabrication process. Electronic chips are mounted onto one face of a collective substrate wafer. A collective flexible sheet made of a heat-conductive material comprising a layer containing pyrolytic graphite is fixed to extend over a collective region extending over the electronic chips and over the collective substrate wafer between the electronic chips. The collective flexible sheet is then compressed. A dicing operation is then carried out in order to obtain electronic devices each including an electronic chip, a portion of the collective plate and a portion of the collective flexible sheet.
    Type: Application
    Filed: June 26, 2017
    Publication date: January 4, 2018
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics SA, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Didier Campos, Benoit Besancon, Perceval Coudrain, Jean-Philippe Colonna