Patents by Inventor Didier Levy

Didier Levy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8183160
    Abstract: A method for manufacturing a semiconductor device includes providing a patterned hard-mask layer. The hard-mask layer is provided on an exposed surface of one or more layers to be patterned of a semiconductor intermediate product. The hard-mask layer covers the exposed surface in covered areas of the one or more layers to be patterned and does not cover the exposed surface in bared areas of the one or more layers to be patterned. One or more recesses are formed in the layers to be patterned by at least partially removing the layers to be patterned in the bared areas. The hard-mask layer is ten removed. After removing the hard-mask layer the recess is filled with a filling material.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: May 22, 2012
    Assignees: Freescale Semiconductor, Inc., ST Microelectronics (Crolles 2) SAS
    Inventors: Anissa Lagha, Robert Fox, Lucile Broussous, Didier Levy
  • Publication number: 20100225003
    Abstract: A method for manufacturing a semiconductor device includes providing a patterned hard-mask layer. The hard-mask layer is provided on an exposed surface of one or more layers to be patterned of a semiconductor intermediate product. The hard-mask layer covers the exposed surface in covered areas of the one or more layers to be patterned and does not cover the exposed surface in bared areas of the one or more layers to be patterned. One or more recesses are formed in the layers to be patterned by at least partially removing the layers to be patterned in the bared areas. The hard-mask layer is ten removed. After removing the hard-mask layer the recess is filled with a filling material.
    Type: Application
    Filed: October 9, 2007
    Publication date: September 9, 2010
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Anissa Lagha, Robert Fox, Lucile Broussous, Didier Levy
  • Publication number: 20060167829
    Abstract: A multi-tier computer architecture is intended to allow access to a personal resources environment, via a network such as Internet from varied access points corresponding to different types of client workstations. The said computer architecture comprises: a standard relational database server tier comprising a database manager able to execute on request all operations on the data of the database, the which database contains, in a manner proper to each user, both data and documents constituting the unique and organised storage space of the user, and the database manager comprising remote operating system functionalities in relation with said storage space.
    Type: Application
    Filed: October 27, 2003
    Publication date: July 27, 2006
    Inventors: Jean Dreyfus, Didier Levy, Haim Mamou, Sacchetti Marc
  • Patent number: 6518114
    Abstract: The invention relates to a method of forming an insulating zone (14) around an active zone (12) in a semiconductor substrate, which method includes the following steps: forming a groove around an active zone (12) in the substrate; and filling the groove with a first material so as to form around the active zone an insulating zone (14) which projects from the surface of the substrate and forms a vertical protrusion at its periphery; and blunting the angle of the protrusion of the insulating zone at the periphery at the active zone. The invention further relates to a semiconductor device formed using said method.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: February 11, 2003
    Assignee: U.S. Philips Corporation
    Inventors: Alain Inard, Dominique Cecile Zulian, Didier Levy, Meindert Martin Lunenborg, Walter Jan August De Coster, Jean Claude Oberlin
  • Publication number: 20010045612
    Abstract: The invention relates to a method of forming an insulating zone (14) around an active zone (12) in a semiconductor substrate, which method includes the following steps:
    Type: Application
    Filed: March 23, 2001
    Publication date: November 29, 2001
    Inventors: Alain Inard, Dominique Cecile Zulian, Didier Levy, Meindert Martin Lunenborg, Walter Jan August De Coster, Jean Claude Oberlin