Abstract: A high speed switching device among a multiplicity of processing modules, for enabling data exchanges of data organized into protocol units, includes a multiplicity of switching interface modules each including an FIFO input memory connected to an input bus and an FIFO output bus, a switching module capable of connecting each of the input buses with each of the output buses, and an arbitration and command module for commanding the switching effected by the switching module. The arbitration and command module commands switching once the destination switching interface module has at least one free space.