Patents by Inventor Didier Serge Sagan

Didier Serge Sagan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8909312
    Abstract: A signal acquisition circuit detects a wanted signal in a composite signal containing the wanted signal and an unwanted signal, where the highest frequency in the unwanted signal is higher than the highest frequency in the wanted signal. A sensor captures the composite signal and an analog-to-digital converter samples and converts the composite signal to digital format, and a filter subtracts the unwanted signal from the composite signal. The sampled signal contains a first component containing the sum of the wanted signal and the unwanted signal sampled at a first rate at least equal to the Nyquist rate for the wanted signal but less than a second rate that is at least equal to the Nyquist rate for the unwanted signal, and a second component containing the unwanted signal sampled at the second rate.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: December 9, 2014
    Assignee: Microsemi Corporation
    Inventors: Didier Serge Sagan, Reghu Kunnath Rajan
  • Publication number: 20120296185
    Abstract: A signal acquisition circuit detects a wanted signal in a composite signal containing the wanted signal and an unwanted signal, where the highest frequency in the unwanted signal is higher than the highest frequency in the wanted signal. A sensor captures the composite signal and an analog-to-digital converter samples and converts the composite signal to digital format, and a filter subtracts the unwanted signal from the composite signal. The sampled signal contains a first component containing the sum of the wanted signal and the unwanted signal sampled at a first rate at least equal to the Nyquist rate for the wanted signal but less than a second rate that is at least equal to the Nyquist rate for the unwanted signal, and a second component containing the unwanted signal sampled at the second rate.
    Type: Application
    Filed: May 17, 2011
    Publication date: November 22, 2012
    Applicant: ZARLINK SEMICONDUCTOR AB
    Inventors: Didier Serge Sagan, Reghu Kunnath Rajan
  • Patent number: 7026804
    Abstract: A method and system for sampling an analog signal that minimizes perturbations caused by noise. In one embodiment, the sample and hold circuit includes a plurality of switches in series between the sampled source and a hold capacitor. A resistor is located in parallel with the first switch. The two switches are controlled so as to provide three signal paths between the hold capacitor and the sampled signal. The first signal path is a closed circuit between the charge capacitor and the sampled signal. This path occurs during a first phase of operation for the sample and hold circuit. During a second phase of operation, the first switch is opened which sends any current loss from the capacitor to path through the resistor. The high resistance provided by the resistor minimizes this current loss. The third signal path occurs when the second switch is opened which present an open circuit between the capacitor and the sampled signal.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: April 11, 2006
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventors: Andrew Michael Bottomley, Didier Serge Sagan
  • Publication number: 20030234641
    Abstract: A method and system for sampling an analog signal that minimizes perturbations caused by noise. In one embodiment, the sample and hold circuit includes a plurality of switches in series between the sampled source and a hold capacitor. A resistor is located in parallel with the first switch. The two switches are controlled so as to provide three signal paths between the hold capacitor and the sampled signal. The first signal path is a closed circuit between the charge capacitor and the sampled signal. This path occurs during a first phase of operation for the sample and hold circuit. During a second phase of operation, the first switch is opened which sends any current loss from the capacitor to path through the resistor. The high resistance provided by the resistor minimizes this current loss. The third signal path occurs when the second switch is opened which present an open circuit between the capacitor and the sampled signal.
    Type: Application
    Filed: June 25, 2002
    Publication date: December 25, 2003
    Inventors: Andrew Michael Bottomley, Didier Serge Sagan