Patents by Inventor Diego Anzola

Diego Anzola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11335657
    Abstract: A data processing system includes a first wafer comprising a plurality of first chips, and kerf and crack-stop structures around perimeters of the first chips, and a second wafer comprising a plurality second chips, a plurality of interconnect structures through a connection zone between the second chips, and a plurality of thru silicon vias, wherein the first wafer and the second wafer are bonded face-to-face such that the interconnect structures of the second wafer electrically connect adjacent chip sites of the first wafer and where a pitch of the chips on the first and second wafer are equal.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 17, 2022
    Assignee: International Business Machines Corporation
    Inventors: Evan Colgan, Timothy J. Chainer, Monty Montague Denneau, Kai Schleupen, Diego Anzola, Mark D. Schultz, Layne A. Berge
  • Publication number: 20220084969
    Abstract: A data processing system includes a first wafer comprising a plurality of first chips, and kerf and crack-stop structures around perimeters of the first chips, and a second wafer comprising a plurality second chips, a plurality of interconnect structures through a connection zone between the second chips, and a plurality of thru silicon vias, wherein the first wafer and the second wafer are bonded face-to-face such that the interconnect structures of the second wafer electrically connect adjacent chip sites of the first wafer and where a pitch of the chips on the first and second wafer are equal.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Inventors: Evan Colgan, Timothy J. Chainer, Monty Montague Denneau, Kai Schleupen, Diego Anzola, Mark D. Schultz, Layne A. Berge
  • Publication number: 20140024146
    Abstract: A semiconductor structure is provided and includes a substrate having an edge surface and a device surface with a central area, a crack stop structure disposed on the device surface and a circuit structure including components disposed on the device surface in the central area and interconnects electrically coupled to the components. The interconnects are configured to extend from the central area to the edge surface while bridging over the crack stop structure.
    Type: Application
    Filed: August 3, 2012
    Publication date: January 23, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Diego Anzola, Evan G. Colgan, Kevin K. Dezfulian, Daniel C. Edelstein, Mark C. H. Lamorey, Sampath Purushothaman, Thomas M. Shaw, Roy R. Yu
  • Publication number: 20140021616
    Abstract: A semiconductor structure is provided and includes a substrate having an edge surface and a device surface with a central area, a crack stop structure disposed on the device surface and a circuit structure including components disposed on the device surface in the central area and interconnects electrically coupled to the components. The interconnects are configured to extend from the central area to the edge surface while bridging over the crack stop structure.
    Type: Application
    Filed: July 19, 2012
    Publication date: January 23, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Diego Anzola, Evan G. Colgan, Kevin K. Dezfulian, Daniel C. Edelstein, Mark C. H. Lamorey, Sampath Purushothaman, Thomas M. Shaw, Roy R. Yu