Patents by Inventor Diego Crupnicoff

Diego Crupnicoff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260205233
    Abstract: A network device includes a port, a packet pipeline, and a redundancy generator. The port is to connect to a network. The packet pipeline is to transmit a sequence of data packets to the network via the port. The redundancy generator is to, for a group of the data packets (i) initialize one or more redundancy blocks, then (ii) iteratively update the one or more redundancy blocks in response to the data packets in the group traversing the packet pipeline, and (iii) generate one or more redundancy packets comprising the one or more redundancy blocks. The redundancy generator is to transmit the one or more redundancy packets to the network using the packet pipeline.
    Type: Application
    Filed: January 14, 2025
    Publication date: July 16, 2026
    Inventors: Yamin Friedman, Idan Burstein, Diego Crupnicoff, Ariel Shahar, Ori Schweitzer, Weihuang Wang
  • Publication number: 20260180824
    Abstract: A system includes one or more processing devices, one or more peripheral devices, and an interconnection fabric to connect the one or more processing devices and the one or more peripheral devices. A plurality of pairs is set-up in the system, each pair including (i) a respective processing device among the one or more processing devices and (ii) a respective peripheral device among the one or more peripheral devices. Each pair is to communicate over a respective tunnel established via the interconnection fabric, so as to provide resources of the peripheral device to the processing device.
    Type: Application
    Filed: December 22, 2024
    Publication date: June 25, 2026
    Inventors: Michael Kagan, Diego Crupnicoff, Yuval Shicht, Daniel Marcovitch, Noam Bloch, Lior Narkis
  • Publication number: 20260005977
    Abstract: Devices, methods, and computer program products are provided for addressing out of order packet delivery in dynamically connected (DC) transport protocols. An example method includes receiving, by a destination device, a plurality of data packets from a transmitting device where each of the plurality of data packets includes a connect header associated with DC establishment and establishing a DC between the destination device and the transmitting device based on one or more of the data packets of the plurality of data packets. The plurality of data packets include a first set of data packets received by the destination device prior to establishment of the DC, and a second set of data packets received by the destination device after establishment of the DC. The establishment of the DC occurs irrespective of an order in which each of the plurality of data packets are received by the destination device.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 1, 2026
    Applicant: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Yamin FRIEDMAN, Idan BURSTEIN, Diego CRUPNICOFF, Roee MOYAL
  • Publication number: 20260006096
    Abstract: Devices, methods, and computer program products are provided for duplicate delivery prevention for dynamically connected transport protocols. An example method includes receiving, by a destination device, a first data packet from a transmitting device that includes instructions for establishing a dynamic connection between the destination device and the transmitting device and establishing the dynamic connection between the destination device and the transmitting device based on the first data packet. The method further includes maintaining the dynamic connection between the destination device and the transmitting device for at least a threshold time period (T) defining a duration during which data packets are received by the destination device from the transmitting device.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 1, 2026
    Applicant: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Yamin FRIEDMAN, Idan BURSTEIN, Ariel SHAHAR, Diego CRUPNICOFF, Roee MOYAL, Miriam MENES
  • Publication number: 20250286823
    Abstract: In one embodiment, a responder device includes a network interface to receive packets of a stream of packets transmitted from a requester device with packet sequence numbers, and packet processing circuitry to collect information about the packet sequence numbers of the packets that have been received from the requester device, generate a selective acknowledgement including an indication of the packet sequence numbers of at least one packet of the packets that has been received and at least one other packet of the packets that has not been received by the responder device from the requester device, wherein the at least one packet that has been received by the responder device includes at least one of the packets received out-of-order according to the packet sequence numbers, and send the selective acknowledgement to the requester device via the network interface.
    Type: Application
    Filed: February 11, 2025
    Publication date: September 11, 2025
    Inventors: Yamin Friedman, Idan Borshteen, Ariel Shahar, Roee Moyal, Shay Aisman, Diego Crupnicoff, Yuval Shpigelman
  • Publication number: 20250240185
    Abstract: A system includes multiple devices, multiple processors and a cross-network bridge. The cross-network bridge includes a bus interface for connecting to a system bus, and bridging circuitry configured to translate between (i) system-bus transactions that are exchanged between one or more local devices and one or more remote processors among the processors, the one or more local devices being coupled to the system bus and served by the system bus, and the one or more remote processors being located across a network from the cross-network bridge, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.
    Type: Application
    Filed: April 8, 2025
    Publication date: July 24, 2025
    Inventors: Daniel Marcovitch, Idan Burstein, Liran Liss, Hillel Chapman, Dror Goldenberg, Michael Kagan, Aviad Yehezkel, Peter Paneah, Diego Crupnicoff, Noam Bloch, Lior Narkis, Yuval Shicht
  • Patent number: 12244670
    Abstract: Apparatus for data communication includes a network interface for connection to a packet data network and a host interface for connection to a host computer, which includes a central processing unit (CPU) and a host memory. Packet processing circuitry receives, via the host interface, from a kernel running on the CPU, associations between multiple remote direct memory access (RDMA) sessions and multiple different User Datagram Protocol (UDP) 5-tuple, which are assigned respectively to the RDMA sessions, and receives from an application running on the CPU a request to send an RDMA message, using a selected group of one or more of the RDMA sessions, to a peer application over the packet data network, and in response to the request, transmits, via the network interface, one or more data packets using a UDP 5-tuple that is assigned to one of the RDMA sessions in the selected group.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: March 4, 2025
    Assignee: Mellanox Technologies, Ltd
    Inventors: Liran Liss, Yamin Friedman, Michael Kagan, Diego Crupnicoff, Idan Burstein, Matty Kadosh, Tzah Oved, Dror Goldenberg, Ron Yuval Efraim, Alexander Eli Rosenbaum, Aviad Yehezkel, Rabia Loulou
  • Publication number: 20230379390
    Abstract: Apparatus for data communication includes a network interface for connection to a packet data network and a host interface for connection to a host computer, which includes a central processing unit (CPU) and a host memory. Packet processing circuitry receives, via the host interface, from a kernel running on the CPU, associations between multiple remote direct memory access (RDMA) sessions and multiple different User Datagram Protocol (UDP) 5-tuple, which are assigned respectively to the RDMA sessions, and receives from an application running on the CPU a request to send an RDMA message, using a selected group of one or more of the RDMA sessions, to a peer application over the packet data network, and in response to the request, transmits, via the network interface, one or more data packets using a UDP 5-tuple that is assigned to one of the RDMA sessions in the selected group.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Inventors: Liran Liss, Yamin Friedman, Michael Kagan, Diego Crupnicoff, Idan Burstein, Matty Kadosh, Tzah Oved, Dror Goldenberg, Ron Yuval Efraim, Alexander Eli Rosenbaum, Aviad Yehezkel, Rabia Loulou
  • Patent number: 11765237
    Abstract: Apparatus for data communication includes a network interface for connection to a packet data network and a host interface for connection to a host computer, which includes a central processing unit (CPU) and a host memory. Packet processing circuitry receives, via the host interface, from a kernel running on the CPU, associations between multiple remote direct memory access (RDMA) sessions and multiple different User Datagram Protocol (UDP) 5-tuple, which are assigned respectively to the RDMA sessions, and receives from an application running on the CPU a request to send an RDMA message, using a selected group of one or more of the RDMA sessions, to a peer application over the packet data network, and in response to the request, transmits, via the network interface, one or more data packets using a UDP 5-tuple that is assigned to one of the RDMA sessions in the selected group.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: September 19, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Liran Liss, Yamin Friedman, Michael Kagan, Diego Crupnicoff, Idan Burstein, Matty Kadosh, Tzah Oved, Dror Goldenberg, Ron Yuval Efraim, Alexander Eli Rosenbaum, Aviad Yehezkel, Rabia Loulou
  • Patent number: 11622004
    Abstract: A method for communication includes receiving in a network device work requests posted by a host processor to perform a series of communication transactions, including at least a first transaction and a second transaction comprising first and second operations to be executed in a sequential order in response to corresponding first and work requests posted by the host processor. In response to the work requests, data packets are transmitted over a network from the network device to a destination node and corresponding responses are received from the destination node. Based on the received responses, completion of the first operations in the first transaction is reported from the network device to the host processor according to the sequential order, and completion of the second operation in the second transaction is reported from the network device to the host processor regardless of whether the first transaction has been completed.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: April 4, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Yamin Friedman, Idan Burstein, Ariel Shahar, Diego Crupnicoff, Roee Moyal
  • Patent number: 11494189
    Abstract: Methods and system for processing data in a programmable processing pipeline are disclosed. In an embodiment, a method for processing packets in a programmable packet processing pipeline is disclosed. The method involves processing data corresponding to a packet through a match-action pipeline of a programmable packet processing pipeline, and diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core for out-of-pipeline processing.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: November 8, 2022
    Assignee: Pensando Systems Inc.
    Inventors: Diego Crupnicoff, Michael B. Galles
  • Patent number: 11252088
    Abstract: A method for managing network congestion is provided. The method comprises: receiving, at a receiver, a packet comprising a timestamp provided by a first clock of a sender; deriving, by the receiver, a latency value based at least in part on the timestamp provided by the first clock and a receipt time provided by a second clock of the receiver; determining a latency change by comparing the latency value with a previous latency value; and determining a state of network congestion based at least in part on the latency change.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: February 15, 2022
    Assignee: PENSANDO SYSTEMS INC.
    Inventors: Raja Rao Tadimeti, Vijay K. Chander, Diego Crupnicoff, Vishal Jain, Madhava Rao Cheethirala
  • Publication number: 20210263744
    Abstract: Methods and system for processing data in a programmable processing pipeline are disclosed. In an embodiment, a method for processing packets in a programmable packet processing pipeline is disclosed. The method involves processing data corresponding to a packet through a match-action pipeline of a programmable packet processing pipeline, and diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core for out-of-pipeline processing.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 26, 2021
    Inventors: Diego CRUPNICOFF, Michael B. GALLES
  • Publication number: 20200336426
    Abstract: A method for managing network congestion is provided. The method comprises: receiving, at a receiver, a packet comprising a timestamp provided by a first clock of a sender; deriving, by the receiver, a latency value based at least in part on the timestamp provided by the first clock and a receipt time provided by a second clock of the receiver; determining a latency change by comparing the latency value with a previous latency value; and determining a state of network congestion based at least in part on the latency change.
    Type: Application
    Filed: August 30, 2018
    Publication date: October 22, 2020
    Inventors: Raja Rao TADIMETI, Vijay K. CHANDER, Diego CRUPNICOFF, Vishal JAIN, Madhava Rao CHEETHIRALA
  • Patent number: 10776272
    Abstract: A memory device includes a target memory, having a memory address space, and a volatile buffer memory, which is coupled to receive data written over a bus to the memory device for storage in specified addresses within the memory address space. A memory controller is configured to receive, via the bus, a flush instruction and, in response to the flush instruction, to immediately flush the data held in the buffer memory with specified addresses within the memory address space to the target memory.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: September 15, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Idan Burstein, Diego Crupnicoff, Shlomo Raikin, Michael Kagan
  • Patent number: 10708219
    Abstract: A method for communication, includes routing unicast data packets among nodes in a network using respective Layer-3 addresses that are uniquely assigned to each of the nodes. Respective Layer-2 unicast addresses are assigned to the nodes in accordance with an algorithmic mapping of the respective Layer-3 addresses. The unicast data packets are forwarded within subnets of the network using the assigned Layer-2 addresses.
    Type: Grant
    Filed: November 20, 2016
    Date of Patent: July 7, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Zachy Haramaty, Diego Crupnicoff, Freddy Gabbay, Benny Koren, Amiad Marelli, Itamar Rabenstein, Ido Bukspan, Oded Zemer
  • Patent number: 10552367
    Abstract: Communication apparatus includes a host interface, configured to be coupled to a host processor having a host memory, and a network interface, which is configured to receive over a network from a sending node data packets conveying operations for execution in a sequential order on a predefined queue pair (QP), including at least a first packet conveying a posted write operation and a second packet conveying a non-posted write operation. Packet processing circuitry is configured to execute the posted write operation in accordance with the sequential order so as to write first data to the host memory prior to the execution of any subsequent operations in the sequential order, and to execute the non-posted write operation so as to write second data to the host memory while allowing one or more of the subsequent operations in the sequential order to be executed prior to completion of writing the second data.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: February 4, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Idan Burstein, Diego Crupnicoff
  • Patent number: 10430374
    Abstract: A method for data transfer includes transmitting a sequence of data packets, including at least a first packet and a second packet transmitted subsequently to the first packet, from a first computer over a network to a second computer in a single remote direct memory access (RDMA) data transfer transaction. Upon receipt of the second packet at the second computer without previously having received the first packet, a negative acknowledgment (NAK) packet is sent from the second computer over the network to the first computer, indicating that the first packet was not received. In response to the NAK packet, the first packet is retransmitted from the first computer to the second computer without retransmitting the second packet.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: October 1, 2019
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adi Menachem, Ariel Shahar, Noam Bloch, Diego Crupnicoff, Michael Kagan
  • Patent number: 10284383
    Abstract: A switch in a data network is configured to mediate data exchanges among network elements. The apparatus further includes a processor, which organizes the network elements into a hierarchical tree having a root node network element, vertex node network elements, and child node network elements that include leaf node network elements. The leaf node network elements are originate aggregation data and transmit the aggregation data to respective parent vertex node network elements. The vertex node network elements combine the aggregation data from at least a portion of the child node network elements, and transmit the combined aggregation data from the vertex node network elements to parent vertex node network elements. The root node network element is operative for initiating a reduction operation on the aggregation data.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: May 7, 2019
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Gil Bloch, Diego Crupnicoff, Benny Koren, Oded Wertheim, Lion Levi, Richard Graham, Michael Kagan
  • Patent number: 10237376
    Abstract: A method for congestion control includes receiving at a destination computer a packet transmitted on a given flow, in accordance with a predefined transport protocol, through a network by a transmitting network interface controller (NIC) of a source computer, and marked by an element in the network with a forward congestion notification. Upon receiving the marked packet in a receiving NIC of the destination computer, a congestion notification packet (CNP) indicating a flow to be throttled is immediately queued for transmission from the receiving NIC through the network to the source computer. Upon receiving the CNP in the transmitting NIC, transmission of further packets on at least the flow indicated by the CNP from the transmitting NIC to the network is immediately throttled, and an indication of the given flow is passed from the transmitting NIC to a protocol processing software stack running on the source computer.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: March 19, 2019
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Diego Crupnicoff, Michael Kagan, Noam Bloch, Adi Menachem, Idan Burstein