Patents by Inventor Diego Raffo

Diego Raffo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120913
    Abstract: A gate driver comprises an input terminal, an output terminal, and first logic configured to generate an output drive signal at the output terminal corresponding to an input drive signal received at the input terminal. A blanking unit is configured to connect a current sense terminal of the gate driver to a reference supply terminal responsive to a low value of the output drive signal and disconnect the current sense terminal from the reference supply terminal after a predetermined delay period responsive to a high value of the output drive signal.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Inventors: Christian LOCATELLI, Diego RAFFO, Zhou Jonah CHEN, Weidong CHU
  • Patent number: 10461730
    Abstract: A gate driver circuit for driving a power switch includes a gate driver having a first input for receiving an input signal and an output coupled to the power switch, the gate driver providing a primary gate current and an auxiliary gate current, and a differential voltage sensor having a first input for receiving the input signal, a second input coupled to a power supply voltage, a third input coupled to a terminal of the power switch, and an output coupled to a second input of the gate driver.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: October 29, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Andrea Luigi Francesco Mariconti, Wolfgang Frank, Christian Locatelli, Diego Raffo, Davide Respigo
  • Patent number: 8685849
    Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: April 1, 2014
    Assignee: Siliconix Technology C. V. IR
    Inventors: Andrea Irace, Giovanni Breglio, Paolo Spirito, Andrea Bricconi, Diego Raffo, Luigi Merlin
  • Patent number: 8274128
    Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: September 25, 2012
    Assignee: Siliconix Technology C. V. IR
    Inventors: Andrea Irace, Giovanni Breglio, Paolo Spirito, Andrea Bricconi, Diego Raffo, Luigi Merlin
  • Publication number: 20090224355
    Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 10, 2009
    Applicant: SILICONIX TECHNOLOGY C. V. IR
    Inventors: Andrea Irace, Giovanni Breglio, Paolo Spirito, Andrea Bricconi, Diego Raffo, Luigi Merlin
  • Publication number: 20070007614
    Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.
    Type: Application
    Filed: July 5, 2006
    Publication date: January 11, 2007
    Inventors: Rossano Carta, Luigi Merlin, Diego Raffo