Abstract: Systems and methods for synchronizing digital communications links, wherein one embodiment implemented in a receiver of a communications link comprises a shift register coupled to a transmission medium to receive synchronization data and a feedback circuit coupled to the shift register, wherein one or more cells of the shift register are configured to alternatively accept as input either a bit from a preceding cell or a received bit of synchronization data. The first occurs prior to synchronization, while the second occurs after synchronization. A counter is used to assert a signal indicating that the transmitter and receiver are synchronized.