Abstract: A protection circuit, and related method, for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element, coupled between a first voltage source and the first power output interface. The detection circuit being operation to detect an output voltage value of the second power output interface to generate a detection result. The first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.

Abstract: A protection circuit, and related method, for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element, coupled between a first voltage source and the first power output interface. The detection circuit being operation to detect an output voltage value of the second power output interface to generate a detection result. The first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.

Abstract: A protection circuit, and related method, for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element, coupled between a first voltage source and the first power output interface. The detection circuit being operation to detect an output voltage value of the second power output interface to generate a detection result. The first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.

Abstract: A protection circuit for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element and a detection circuit. The first switch element is coupled between a first voltage source and the first power output interface. In an operation of the protection circuit, the detection circuit detects an output voltage value of the second power output interface to generate a detection result, and the first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.

Abstract: A protection circuit for an electronic device including a first power output interface and a second power output interface is disclosed. The protection circuit includes a first switch element and a detection circuit. The first switch element is coupled between a first voltage source and the first power output interface. In an operation of the protection circuit, the detection circuit detects an output voltage value of the second power output interface to generate a detection result, and the first switch element, according to the detection result, connects the first voltage source to the first power output interface to allow the first power output interface to output power to an external terminal, or disconnects the first voltage source from the first power output interface.

Abstract: A control circuit applied to digital visual interface (DVI) includes a detecting circuit and a switching circuit. The detecting circuit detects a state of a predetermined pin of a DVI connector to generate a control signal. The switching circuit selectively connects a first pin and a second pin of the DVI connector to one a storage unit storing first identification data and a storage unit storing second identification data according to the control signal.

Abstract: A device applied to a display includes a receiving circuit, a detecting circuit, an image processing circuit and a response time enhancing circuit. The receiving circuit receives an input image signal. The detecting circuit detects a frame rate of image data of a frame in the input image signal. The image processing circuit performs image processing on the image data of the frame to generate a target pixel value of multiple pixels in the frame. The response time enhancing circuit determines multiple adjusted pixel values of the multiple pixels according to the frame rate, and outputs the adjusted pixel values to a display panel. For a pixel, the adjusted pixel values generated for the pixel under different frame rates are different.

Abstract: A device applied to a display includes a receiving circuit, a detecting circuit, an image processing circuit and a response time enhancing circuit. The receiving circuit receives an input image signal. The detecting circuit detects a frame rate of image data of a frame in the input image signal. The image processing circuit performs image processing on the image data of the frame to generate a target pixel value of multiple pixels in the frame. The response time enhancing circuit determines multiple adjusted pixel values of the multiple pixels according to the frame rate, and outputs the adjusted pixel values to a display panel. For a pixel, the adjusted pixel values generated for the pixel under different frame rates are different.

Abstract: A display controller includes a plurality of memories and an enable control circuit. Each of the memories stores one set of extended display identification data (EDID). The enable control circuit selects and enables one of the memories and disables the remaining memories to allow a source device to read the corresponding EDID stored in the enabled memory.

Abstract: A method for reading identification data from a display device includes: receiving an external supply voltage via a display connector of the display device, and generating an internal supply voltage according to the external supply voltage; selectively providing one of the internal supply voltage and a system supply voltage to a microprocessor; and reading the identification data from a second memory by using the microprocessor, and storing the identification data to a first memory.

Abstract: A control circuit applied to digital visual interface (DVI) includes a detecting circuit and a switching circuit. The detecting circuit detects a state of a predetermined pin of a DVI connector to generate a control signal. The switching circuit selectively connects a first pin and a second pin of the DVI connector to one a storage unit storing first identification data and a storage unit storing second identification data according to the control signal.

Abstract: An image processing device for processing an image signal is provided. The image processing device includes a circuit board, a slot and an image processing module. The slot, disposed on the circuit board, is to be plugged in by either a first connector corresponding to a first image interface format or a second connector corresponding to a second image interface format. The image processing module, disposed on the circuit board and coupled to the slot, detects the image signal inputted from either the first connector or the second connector to determine a target image interface format, and processes the image signal by an image processing method corresponding to the target image interface format.

Abstract: An image processing device for processing an image signal is provided. The image processing device includes a circuit board, a slot and an image processing module. The slot, disposed on the circuit board, is to be plugged in by either a first connector corresponding to a first image interface format or a second connector corresponding to a second image interface format. The image processing module, disposed on the circuit board and coupled to the slot, detects the image signal inputted from either the first connector or the second connector to determine a target image interface format, and processes the image signal by an image processing method corresponding to the target image interface format.

Abstract: A mirror liquid crystal display. A plurality of pixel regions, each includes a transparent region and a non-transparent region. A plurality of mirror electrode layers are formed on the corresponding non-transparent regions, with the mirror electrodes connected with each other. A plurality of transmissive electrode layers on the corresponding transparent regions are isolated from the mirror electrode layers. A voltage is coupled to the mirror electrode layers to control liquid crystals over the non-transparent region.