Abstract: A carrier wafer includes a flat substrate with a top side and a bottom side. A first layer sequence, at least on the top side of the substrate, is arranged with area parallel to the substrate. The first layer sequence has an isolating layer. A flat, conductive electrode is arranged on the first layer sequence with area parallel to the substrate. Everywhere that it is not in contact with the first layer sequence, the electrode is surrounded by a second layer sequence having a layer made of an isolating material. In a region, which forms a tunnel window and on which the electrode is arranged, the first layer sequence is thinner than on the rest of its area. An electrical voltage can be applied to the substrate in such a way that the electrical field lines caused by the applied voltage pass through the tunnel window. The electrode can be charged, by means of a potential difference between the electrode and the substrate caused by the applied voltage, in that electrons tunnel through the tunnel window.