Abstract: An analog-to-digital converter for converting a multitude of analog input signals into a corresponding multitude of digital signals comprises a series arrangement of an analog multiplexer (2), an oversampling sigma-delta modulator (8), a decimator-cum-low-pass filter (10), a digital demultiplexer (12), an interpolator (14) and a digital matrix (16), which are all operated in synchronism.

Abstract: A discrete-time signal processing system includes a signal sampling circuit controlled by a sampling signal generator in which a clock signal is derived from an oscillation signal having a higher frequency by means of a switchable frequency divider which is driven by a sigma-delta modulator. By alternately switching from one dividend n to the other dividend n+1 and vice versa, an effective dividend m, where n.ltoreq.m.ltoreq.n+1, is realized, so that a very fine frequency tuning can take place. The use of the .SIGMA.-.DELTA. modulator is advantageous in that the frequency spectrum of the sampled signal is not corrupted by the frequency spectrum of the sampling signal (clock signal) generated by way of the switching frequency divider.

Abstract: A receiver having a signal path incorporating a tuner, a demodulator circuit for supplying a stereo multiplex signal having a baseband stereo sum signal (L+R), a 19 kHz stereo pilot and a stereo difference signal (L-R) which is double sideband amplitude-modulated on a suppressed 38 kHz subcarrier, a sampler for converting an analog signal into a time-discrete signal and a stereo decoder for time-division multiplex decoding of a time-discrete stereo multiplex signal into time-discrete left and right stereo signals. In order to realize an effective selection of the stereo multiplex signal by an easily integrable low-pass filter, the stereo decoder includes a time-discrete halfband low-pass filter circuit having a finite impulse response, with a transition band which is substantially located in the frequency range of said modulated stereo difference signal and with a half-value transfer which is located at the frequency of said 38 kHz stereo subcarrier.

Abstract: Sampling frequency converter for converting the sampling frequency of a discrete-time signal (d.sub.i) from a first sampling frequency (f.sub.i) to a second sampling frequency (f.sub.o) by sample validation, the number of samples of the discrete-time signal being omitted (or repeated) per unit of time depending on the frequency difference between the first and second sampling frequencies, so that a validated sample sequence is developed with a third sampling frequency having a value f.sub.v which, in essence, is equal to the value f.sub.o (or f.sub.i), the converter including a frequency meter (52) for converting a frequency difference between the second (or first) and third sampling frequencies to a control signal (v.sub.c) which is a measurement for the frequency difference, a sigma-delta modulator (10) for converting the control signal to an at least binary decision signal (24), and a validation circuit (48) for omitting (or repeating) a sample from the discrete-time signal d.sub.