Abstract: Automatic test equipment capable of receiving diagnostic information from a device under test having a built-in self-test system (BIST) and a diagnostic information collector in which the diagnostic information collector temporarily stores diagnostic patterns output by the BIST and provides a fault indication upon detecting a fault in the device under test. Such ATE comprises a device interface connectable to the device under test, a processing system and processing channels. The processing channels are each connected to the device interface and to the processing system and comprise test channels, a fault indication channel and a diagnostic information channel. The test channels are interoperable with the BIST to subject the device under test to a sequence of tests. The fault indication channel is connected to receive the fault indication from the device interface.

Abstract: A phase comparator is used to test a device under test comprising an input/output (I/O) circuit by applying a signal to the device under test; extracting a phase signal from the phase comparator; and determining parametric information pertaining to the I/O circuit of the device under test from the phase signal.

Abstract: An adaptive test system includes one or more reconfigurable test boards, with each test board including at least one re-configurable test processor. The re-configurable test processors can transmit communicate with one another using an inter-processor communications controller associated with each re-configurable test processor. The communications include configuration information, control information, communication protocols, stimulus data, and responses. Configuration information and stimulus data can also be read from a memory. Configuration information is used to configure one or more re-configurable test processors. Once configured, the re-configurable test processor or processors process the data in order to generate one or more test signals. The one or more test signals are then used to test a DUT.

Abstract: Systems and methods of allocating device testing resources are described. In one aspect, a system for allocating m resources for testing devices to n sites of a probe card configured to electrically connect to respective test site locations on a substrate, where m and n are integers and m<n, is described. The system includes a configurable interconnection network that includes a plurality of connections between resources and the probe card sites. The connections enable each test site location to be connected to at least one of the resources over a minimum number of touchdowns of the probe card onto the test sites. Each of the resources is connectable to at most a number of the probe card sites equal to the minimum number of touchdowns. A method of allocating m resources for testing devices to n sites of a probe card configured to electrically connect to respective test site locations on a substrate, where m and n are integers and m<n, also is described.

Abstract: Automated test equipment (ATE) includes a tester-per-pin architecture with a number of individual decentralized per-pin testing units, wherein each per-pin testing unit is adapted for testing a respective DUT-pin of a device under test (DUT) by emitting stimulus response signals to the respective DUT-pin and/or receiving stimulus response signals from the respective DUT-pin. Testing the DUT includes defining for a testing sequence the DUT into one or more DUT-cores representing one or more functional units of the DUT and covering one or more DUT-pins of the DUT, and assigning during the testing sequence one or more of the per-pin testing units to one or more ATE-ports, whereby each ATE-port comprises one or more of the per-pin testing units and represents an independent functional testing unit for testing one or more of the DUT-cores during the testing sequence.

Abstract: Representative embodiments are generally directed to storing compressed test pattern data on an automated test equipment (ATE) device. In one embodiment, the test pattern data is compressed according to a linear feedback shift register (LFSR). The LFSR may possess a low probability of occurrence of linear dependencies associated with compression of stimulus patterns to enable relatively highly compacted patterns to be compressed. Additionally or alternatively, repeat-filled test pattern data is run length encoded using variable length code words to facilitate parallel decompression within the ATE device.

Abstract: Disclosed is an automated test equipment—ATE—(200) having a tester-per-pin architecture with a plurality of individual decentralized per-pin testing units (700), wherein each per-pin testing unit (700i) being adapted for testing a respective DUT-pin (di) of a device under test—DUT—(600) by emitting stimulus response signals to the respective DUT-pin and/or receiving stimulus response signals from the respective DUT-pin.

Abstract: A railroad railway for rail-mounted vehicles capable of high speed travel includes a track grating formed of rails and ties with the ties partially embedded in a poured-in-place steel reinforced concrete slab. The concrete slab is mounted on a continuous concrete substructure with a separating layer arranged between the slab and substructure. A single layer of steel reinforcement is located in the concrete slab spaced below the ties. The slab is dimensioned so that it serves only for plate-like stiffening of the track grating without any appreciable inherent bending resistance. The slab is secured against longitudinal and transverse displacement of the substructure, while the substructure is dimensioned to absorb bending moments developed in the longitudinal direction of the rails. The concrete slab is divided in the longitudinal direction by transversely extending expansion joints whereby sections of the slab can be replaced if damage occurs.

Abstract: In a multi-span bridge support system, the superstructure includes a row of elongated single-span girders arranged end-to-end and supported at their ends on vertical support columns. At least two adjacent girders in a row are provided with fixed bearings at the juxtaposed ends over a common support column. The opposite ends of the girders are mounted on horizontally movable bearings. The location of the fixed bearing and the common support column forms a fixed point. At the fixed point the ends of the girders are notched so that the vertical and horizontal surfaces within the notched region face corresponding surfaces on the top of the support column. A vertical bearing for transmitting horizontal forces extending in the elongated direction of the girders, is located between the top of the support column and the juxtaposed vertical surface within the notched region of the adjacent girders.