Patents by Inventor Dieter Kaiser

Dieter Kaiser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11640908
    Abstract: A method of implanting an implant species into a substrate at different depths is described. The method includes forming an implant mask over the substrate. The implant mask includes a first implant zone designed as an opening and a second implant zone designed as a block array. The implant species is implanted through the implant mask under an implant angle tilted against a block plane, such that a first implant area is formed by the implant species at a first depth in the substrate beneath the first implant zone and a second implant area is formed by the implant species at a second depth in the substrate beneath the second implant zone. The first depth is greater than the second depth.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: May 2, 2023
    Assignee: Infineon Technologies AG
    Inventors: Joerg Ortner, Marcel Heller, Dieter Kaiser, Nicolo Morgana, Jens Schneider
  • Publication number: 20200373163
    Abstract: A method of implanting an implant species into a substrate at different depths is described. The method includes forming an implant mask over the substrate. The implant mask includes a first implant zone designed as an opening and a second implant zone designed as a block array. The implant species is implanted through the implant mask under an implant angle tilted against a block plane, such that a first implant area is formed by the implant species at a first depth in the substrate beneath the first implant zone and a second implant area is formed by the implant species at a second depth in the substrate beneath the second implant zone. The first depth is greater than the second depth.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 26, 2020
    Inventors: Joerg Ortner, Marcel Heller, Dieter Kaiser, Nicolo Morgana, Jens Schneider
  • Patent number: 10394212
    Abstract: An apparatus and a method for the parallel and independent operation of a normal program and a secure program on the basis of a runtime system structure have all components that are relevant to the control integrated on a hardware component with a specific hardware architecture and be isolated from one another by a runtime system structure for two dual runtime systems for making changes to non-security-relevant components without restriction. The isolation can be provided by prioritizing one of the runtime systems. Such a runtime system structure or hardware architecture eliminates the need for follow-up certification of user-programmable controllers and the certification of the security-critical component is valid even when changes to the non-security-relevant components are made.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: August 27, 2019
    Assignee: INTER CONTROL Hermann Kohler Elektrik GmbH & Co. KG
    Inventors: Alexander Holler, Hans-Dieter Kaiser, Werner Pfister, Jorn Rieve, Hans-Jurgen Emmerling
  • Patent number: 10241391
    Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: March 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Jens Schneider, Henning Feick, Marcel Heller, Dieter Kaiser
  • Patent number: 9911946
    Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: March 6, 2018
    Assignee: INFINEON TECHNOLOGIES DRESDEN GMBH
    Inventors: Alessia Scire, Dieter Kaiser, Tarja Hauck, Frank Zschorlich
  • Patent number: 9837280
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: December 5, 2017
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
  • Publication number: 20170178909
    Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 22, 2017
    Inventors: Jens Schneider, Henning Feick, Marcel Heller, Dieter Kaiser
  • Publication number: 20170104187
    Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.
    Type: Application
    Filed: December 22, 2016
    Publication date: April 13, 2017
    Inventors: Alessia Scire, Dieter Kaiser, Tarja Hauck, Frank Zschorlich
  • Patent number: 9613812
    Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: April 4, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Jens Schneider, Henning Feick, Marcel Heller, Dieter Kaiser
  • Patent number: 9564550
    Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 7, 2017
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Alessia Scire, Dieter Kaiser, Tarja Hauck, Frank Zschorlich
  • Publication number: 20160343577
    Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.
    Type: Application
    Filed: August 5, 2016
    Publication date: November 24, 2016
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
  • Patent number: 9437440
    Abstract: A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas extending to an upper side so that adjacent semiconductor mesas are spaced apart from each other by one of a substantially empty trench and a trench substantially filled with a sacrificial layer selectively etchable with respect to the semiconductor mesas; forming a support structure mechanically connecting the semiconductor mesas spaced apart from each other by one of the substantially empty trench and the trench substantially filled with the sacrificial layer; and processing the semiconductor substrate from the upper side while the semiconductor mesas are mechanically connected via the support structure.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: September 6, 2016
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Kurt Sorschag, Daniel Sarlette, Felix Braun, Marcel Heller, Dieter Kaiser, Ingo Meusel, Marko Lemke, Anton Mauder, Helmut Strack
  • Publication number: 20160079182
    Abstract: A method for processing a carrier may include forming at least one recess structure at least one of over and in the carrier; and annealing the at least one recess structure such that at least one hollow chamber is formed by material of the at least one recess structure, wherein the at least one hollow chamber may form an optical alignment structure.
    Type: Application
    Filed: November 24, 2015
    Publication date: March 17, 2016
    Inventors: Tarja Hauck, Alessia Sciré, Dieter Kaiser, Andreas Greiner, Nicolo Morgana, Carolin Wetzig, Dietrich Burmeister
  • Patent number: 9230917
    Abstract: A method for processing a carrier may include forming at least one recess structure at least one of over and in the carrier; and annealing the at least one recess structure such that at least one hollow chamber is formed by material of the at least one recess structure, wherein the at least one hollow chamber may form an optical alignment structure.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: January 5, 2016
    Assignee: INFINEON TECHNOLOGIES DRESDEN GMBH
    Inventors: Tarja Hauck, Alessia Sciré, Dieter Kaiser, Andreas Greiner, Morgana Nicolo, Carolin Wetzig, Dietrich Burmeister
  • Patent number: 9202832
    Abstract: An integrated circuit arrangement is provided, including a transistor including a gate region; and a wavelength conversion element, wherein the wavelength conversion element may include the same material or same materials as the gate region of the transistor.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: December 1, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Dieter Kaiser, Dirk Meinhold, Thoralf Kautzsch, Georg Holfeld
  • Publication number: 20150338835
    Abstract: An apparatus and a method for the parallel and independent operation of a normal program and a secure program on the basis of a runtime system structure have all components that are relevant to the control integrated on a hardware component 30 with a specific hardware architecture 300 and be isolated from one another by a runtime system structure 33, 34, 301 for two dual runtime systems for making changes to non-security-relevant components without restriction. The isolation can be provided by prioritizing one of the runtime systems. Such a runtime system structure 301 or hardware architecture 300 eliminates the need for follow-up certification of user-programmable controllers and the certification of the security-critical component is valid even when changes to the non-security-relevant components are made.
    Type: Application
    Filed: June 26, 2013
    Publication date: November 26, 2015
    Inventors: Alexander HOLLER, Hans-Dieter KAISER, Werner PFISTER, Jorn RIEVE, Hans-Jurgen EMMERLING
  • Publication number: 20150287599
    Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.
    Type: Application
    Filed: April 23, 2015
    Publication date: October 8, 2015
    Inventors: Jens Schneider, Henning Feick, Marcel Heller, Dieter Kaiser
  • Patent number: 9029049
    Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: May 12, 2015
    Assignee: Infineon Technologies AG
    Inventors: Jens Schneider, Henning Feick, Marcel Heller, Dieter Kaiser
  • Publication number: 20150115226
    Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.
    Type: Application
    Filed: October 28, 2013
    Publication date: April 30, 2015
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Alessia Scire, Dieter Kaiser, Tarja Hauck, Frank Zschorlich
  • Publication number: 20140353852
    Abstract: A method for processing a carrier may include forming at least one recess structure at least one of over and in the carrier; and annealing the at least one recess structure such that at least one hollow chamber is formed by material of the at least one recess structure, wherein the at least one hollow chamber may form an optical alignment structure.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 4, 2014
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Tarja Hauck, Alessia Sciré, Dieter Kaiser, Andreas Greiner, Morgana Nicolo, Carolin Wetzig, Dietrich Burmeister