Abstract: A device can be used for establishing gas concentrations in an examination volume. A radiation source is configured to generate an electromagnetic beam. A beam guiding apparatus is arranged downstream of the radiation source. The beam guiding apparatus is configured to set a plurality of variations of beam guidance of the beam entering the beam guiding apparatus in an observation plane in the examination volume. A spectrometer is arranged downstream of the beam guiding apparatus. The spectrometer is configured to carry out a spectral analysis of the beam leaving the beam guiding apparatus. An evaluation unit is configured to establish in the observation plane a 2D concentration distribution for one or more gases in the examination volume on the basis of the spectral analysis for different variations of beam guidance.

Abstract: A device can be used for establishing gas concentrations in an examination volume. A radiation source is configured to generate an electromagnetic beam. A beam guiding apparatus is arranged downstream of the radiation source. The beam guiding apparatus is configured to set a plurality of variations of beam guidance of the beam entering the beam guiding apparatus in an observation plane in the examination volume. A spectrometer is arranged downstream of the beam guiding apparatus. The spectrometer is configured to carry out a spectral analysis of the beam leaving the beam guiding apparatus. An evaluation unit is configured to establish in the observation plane a 2D concentration distribution for one or more gases in the examination volume on the basis of the spectral analysis for different variations of beam guidance.

Abstract: An embodiment of an integrated circuit comprises a plurality of cells. Each cell comprises a first supply node, a second supply node, a series connection with a first transistor, a second transistor and an electrical element. The series connection is coupled between the first and the second supply node. The electrical element includes a first and a second node. A third transistor is coupled between the first node of the electrical element and a first output node of the cell and a fourth transistor is coupled between the second node of the electrical element and the second output node of the cell. A control terminal of the first, the third and the fourth transistor is coupled to a first control node of the cell and a control terminal of the second transistor is coupled to a second control node of the cell.

Abstract: An embodiment of an integrated circuit comprises a plurality of cells. Each cell comprises a first supply node, a second supply node, a series connection with a first transistor, a second transistor and an electrical element. The series connection is coupled between the first and the second supply node. The electrical element includes a first and a second node. A third transistor is coupled between the first node of the electrical element and a first output node of the cell and a fourth transistor is coupled between the second node of the electrical element and the second output node of the cell. A control terminal of the first, the third and the fourth transistor is coupled to a first control node of the cell and a control terminal of the second transistor is coupled to a second control node of the cell.

Abstract: Power amplifier circuit for integrated digital circuits that combines the low permanent current consumption of a NOF push-pull output stage with the well-defined high level of a NON-NOFF amplifier stage having external clamp diode. An optimization of the leading edge is additionally achieved by fast drive and transient overdrive. A preceding inverter reduces the input capacitance of the overall circuit.

Abstract: Address amplifier circuit having automatic interlock and protection against multiple addressing for use in static GaAs RAMs. In the address amplifier circuit the address is doubly stored and only those signals that cannot trigger a misdecoding are forwarded from the address amplifier to a decoder circuit.