Abstract: The invention relates to a plant and a method for the treatment and disposal of waste water containing salts and oil, in particular produced water, comprising at least one settling area for receiving the waste water and for separating oil proportions from the waste water, at least one subsequent reed bed area having plants for the uptake and degradation of contaminants in the waste water, at least one modular basin area having a plurality of utility basins, whereby a utility basin, controlled by way of distribution means, can be supplied with treated waste water from the reed bed area and/or from at least one other utility basin, and at least one saline area for the reception of the residual water from the modular basin area and for the evaporation of water and the concentration of salt.

Abstract: The invention relates to a plant and a method for the treatment and disposal of waste water containing salts and oil, in particular produced water, comprising at least one settling area for receiving the waste water and for separating oil proportions from the waste water, at least one subsequent reed bed area having plants for the uptake and degradation of contaminants in the waste water, at least one modular basin area having a plurality of utility basins, whereby a utility basin, controlled by way of distribution means, can be supplied with treated waste water from the reed bed area and/or from at least one other utility basin, and at least one saline area for the reception of the residual water from the modular basin area and for the evaporation of water and the concentration of salt.

Abstract: In a multicomputer system (MRS) with a central computer (ZR), a number of peripheral computers (PR0, . . . , PR29) signal their availability to the central computer (ZR) when starting or restarting the system. It is possible that overload situations occur during this process. According to the invention, a computer-dependent signal delay (V.sub.PR) of the availability is provided for each peripheral computer (PR0, . . . , PR29) within a predetermined time interval (T). Each peripheral computer has a specific computer number (n.sub.PR). All peripheral computers (PR0, . . . , PR29) should have signaled their availability within the predetermined time interval (T). For this purpose, the maximum number (n.sub.max) of peripheral computers (PR0, . . . , PR29) must be known and the central computer (ZR) must be able to process simultaneously an available quantity (A) of peripheral computers (PR0, . . . , PR29) that signal their availability. In this case, the computer-dependent signal delay (V.sub.