Abstract: A semiconductor device includes a semiconductor body having a semiconductor substrate of a first conductivity type and a semiconductor layer of the first conductivity type on the substrate. A trench structure extends into the semiconductor body from a first surface and includes a gate electrode and at least one field electrode arranged between the gate electrode and a bottom side of the trench structure. A body region adjoins the trench structure and laterally extends from a transistor cell area into an edge termination area. A pn junction is between the body region and semiconductor layer. A doping concentration of at least one of the body region and semiconductor layer is lowered at a lateral end of the pn junction in the edge termination area compared to a doping concentration of the at least one of the body region and semiconductor layer at the pn junction in the transistor cell area.

Abstract: A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.

Abstract: A semiconductor device includes a semiconductor body having a semiconductor substrate of a first conductivity type and a semiconductor layer of the first conductivity type on the substrate. A trench structure extends into the semiconductor body from a first surface and includes a gate electrode and at least one field electrode arranged between the gate electrode and a bottom side of the trench structure. A body region adjoins the trench structure and laterally extends from a transistor cell area into an edge termination area. A pn junction is between the body region and semiconductor layer. A doping concentration of at least one of the body region and semiconductor layer is lowered at a lateral end of the pn junction in the edge termination area compared to a doping concentration of the at least one of the body region and semiconductor layer at the pn junction in the transistor cell area.

Abstract: A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.

Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.

Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.

Abstract: A field-effect transistor and a method for manufacturing a field-effect transistor is disclosed. One embodiment includes a substrate having a surface along which a trench is implemented, wherein the trench has a trench bottom and a trench edge. A source area is implemented at the trench edge and a gate electrode at least partially implemented in the trench and separated from the substrate by an insulation layer. The field-effect transistor includes a drain electrode at a side of the substrate facing away from the surface. An additional electrode is implemented between the gate electrode and the trench bottom and electrically insulated from the substrate and an electrical connection between the additional electrode and the gate electrode, wherein the electrical connection has a predetermined ohmic resistance value.

Abstract: A semiconductor component includes a surface region. A modified doping region is provided in the edge region of the cell array. In the surface region or modified doping region the doping concentration is lowered and/or in the surface region or modified doping region the conductivity type is formed such that it is opposite to the conductivity type of the actual semiconductor material region, or in which a field plate region is provided.

Abstract: The invention relates to a MOS transistor device of the trench type, in which, in a semiconductor region of a first conductivity type, within a deep gate trench extending in the vertical direction of the semiconductor region, a vertical gate electrode and a gate oxide with a field plate step insulating the latter are formed and, in an adjoining mesa region outside and laterally with respect to the deep trench, at the upper section thereof, a source electrode region of the first conductivity type and a body region of a second conductivity type with one or a plurality of assigned body contact are formed, a drain electrode region of the first conductivity type lying opposite the deep trench in the vertical direction. The MOS transistor has a deep body reinforcement of the second conductivity type below the body region at the location of the body contact, said body reinforcement lying deeper than the field plate step.

Abstract: A trench transistor is disclosed. One embodiment has an active zone enclosed by an edge trench, wherein an edge electrode at gate potential is embedded into the edge trench, and the active zone has a mesa structure at least partly adjoining the edge trench. That region of the mesa structure which adjoins the edge trench is at least partly electrically deactivated by virtue of the fact that within this deactivated region a) the mesa structure is covered with a mesa insulation layer, and b) no source zone is provided.

Abstract: A semiconductor component and also a method for producing it are disclosed. In one embodiment, the semiconductor component includes a surface region or a modified doping region is provided alternatively or simultaneously in the edge region of the cell array, in which surface region or modified doping region the doping concentration is lowered and/or in which surface region or modified doping region the conductivity type is formed such that it is opposite to the conductivity type of the actual semiconductor material region, or in which a field plate region is provided.

Abstract: A semiconductor component includes a surface region. A modified doping region is provided in the edge region of the cell array. In the surface region or modified doping region the doping concentration is lowered and/or in the surface region or modified doping region the conductivity type is formed such that it is opposite to the conductivity type of the actual semiconductor material region, or in which a field plate region is provided.

Abstract: A field-effect transistor and a method for manufacturing a field-effect transistor is disclosed. One embodiment includes a substrate having a surface along which a trench is implemented, wherein the trench has a trench bottom and a trench edge. A source area is implemented at the trench edge and a gate electrode at least partially implemented in the trench and separated from the substrate by an insulation layer. The field-effect transistor includes a drain electrode at a side of the substrate facing away from the surface. An additional electrode is implemented between the gate electrode and the trench bottom and electrically insulated from the substrate and an electrical connection between the additional electrode and the gate electrode, wherein the electrical connection has a predetermined ohmic resistance value.

Abstract: A trench transistor is disclosed. One embodiment has an active zone enclosed by an edge trench, wherein an edge electrode at gate potential is embedded into the edge trench, and the active zone has a mesa structure at least partly adjoining the edge trench. That region of the mesa structure which adjoins the edge trench is at least partly electrically deactivated by virtue of the fact that within this deactivated region a) the mesa structure is covered with a mesa insulation layer, and b) no source zone is provided.

Abstract: The invention relates to a MOS transistor device of the trench type, in which, in a semiconductor region of a first conductivity type, within a deep gate trench extending in the vertical direction of the semiconductor region, a vertical gate electrode and a gate oxide with a field plate step insulating the latter are formed and, in an adjoining mesa region outside and laterally with respect to the deep trench, at the upper section thereof, a source electrode region of the first conductivity type and a body region of a second conductivity type with one or a plurality of assigned body contact are formed, a drain electrode region of the first conductivity type lying opposite the deep trench in the vertical direction. The MOS transistor has a deep body reinforcement of the second conductivity type below the body region at the location of the body contact, said body reinforcement lying deeper than the field plate step.

Abstract: A semiconductor component and also a method for producing it are disclosed. In one embodiment, the semiconductor component includes a surface region or a modified doping region is provided alternatively or simultaneously in the edge region of the cell array, in which surface region or modified doping region the doping concentration is lowered and/or in which surface region or modified doping region the conductivity type is formed such that it is opposite to the conductivity type of the actual semiconductor material region, or in which a field plate region is provided.

Abstract: In a field-effect transistor, an electric field is produced above the gate dielectric, and generates a tunneling current through the gate dielectric. The tunneling current, lying below the breakdown charge of the gate dielectric, leads to the formation of stationary charges in the gate dielectric, which can alter the threshold voltage of the field-effect transistor. Thus, customary field-effect transistors can be programmed and, in particular, used for storing data values.