Patents by Inventor DIGVIJAY A. RORANE

DIGVIJAY A. RORANE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160086894
    Abstract: Embodiments include semiconductor device packages and methods of forming such packages. In an embodiment, the package may include a die-side reinforcement layer with a cavity formed through the die-side reinforcement layer. A die having a first side and an opposite second side comprising a device side may be positioned in the cavity with the first side of the die being substantially coplanar with a first side of the die-side reinforcement layer. In an embodiment, a build-up structure may be coupled to a second side of the die. Embodiments include a build-up structure that includes a plurality of alternating layers of patterned conductive material and insulating material.
    Type: Application
    Filed: September 19, 2014
    Publication date: March 24, 2016
    Inventors: DIGVIJAY A. RORANE, Ian En Yoon Chin, Daniel N. Sobieski