Patents by Inventor Digvijay Pratap SINGH

Digvijay Pratap SINGH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9142322
    Abstract: An embodiment of a manager includes at least one input node configured to receive information regarding a region of an integrated circuit, and a determiner configured to determine, in response to the information, a likelihood that the region will cause an error. For example, the region may include a memory, and contents of the memory may be transferred to another, more reliable memory, if the likelihood that the memory will cause an error in the data that it stores equals or exceeds a likelihood threshold.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: September 22, 2015
    Assignee: STMicroelectronics International N.V.
    Inventors: Deepak Baranwal, Digvijay Pratap Singh, Kaushik Saha
  • Publication number: 20140047285
    Abstract: An embodiment of a manager includes at least one input node configured to receive information regarding a region of an integrated circuit, and a determiner configured to determine, in response to the information, a likelihood that the region will cause an error. For example, the region may include a memory, and contents of the memory may be transferred to another, more reliable memory, if the likelihood that the memory will cause an error in the data that it stores equals or exceeds a likelihood threshold.
    Type: Application
    Filed: August 12, 2013
    Publication date: February 13, 2014
    Applicant: STMicroelectronics International N.V.
    Inventors: Deepak BARANWAL, Digvijay Pratap SINGH, Kaushik SAHA