Patents by Inventor Dileep Marchya

Dileep Marchya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11705091
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for parallelization of GPU composition with DPU topology selection. A processor may receive an indication of a plurality of application layers for composition at a first processor (e.g., a DPU) and a second processor (e.g., a GPU). The processor may select one or more first application layers of the plurality of application layers for attempted composition at the first processor and one or more second application layers of the plurality of application layers for composition at the second processor. The processor may transmit each of the one or more first application layers to the first processor for composition and each of the one or more second application layers to the second processor for composition.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: July 18, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Sushil Chauhan, Mahesh Aia, Dileep Marchya
  • Publication number: 20230096035
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for parallelization of GPU composition with DPU topology selection. A processor may receive an indication of a plurality of application layers for composition at a first processor (e.g., a DPU) and a second processor (e.g., a GPU). The processor may select one or more first application layers of the plurality of application layers for attempted composition at the first processor and one or more second application layers of the plurality of application layers for composition at the second processor. The processor may transmit each of the one or more first application layers to the first processor for composition and each of the one or more second application layers to the second processor for composition.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Sushil CHAUHAN, Mahesh AIA, Dileep MARCHYA
  • Publication number: 20220343459
    Abstract: The present disclosure relates to methods and apparatus for display processing. For example, disclosed techniques facilitate regional processing of images for under-display device displays. Aspects of the present disclosure can identify a subsection of a set of frame layers, the identified subsection corresponding to a lower pixel density region, relative to at least one other region, of a display. Aspects of the present disclosure can also blend first pixel data for each frame layer corresponding to the identified subsection to generate second pixel data. Further, aspects of the present disclosure can populate a buffer layer based on the second pixel data. Additionally, aspects of the present disclosure can blend pixel data from the set of frame layers and the buffer layers to generate a blended image. Aspects of the present disclosure can also transmit the blended image for presentment via the display.
    Type: Application
    Filed: October 14, 2020
    Publication date: October 27, 2022
    Inventors: Nan ZHANG, Yongjun XU, Dileep MARCHYA
  • Publication number: 20220284536
    Abstract: The present disclosure relates to methods and apparatus for display processing, the apparatus configured to identify an adjustment in one or more layers of a plurality of layers in a current frame compared to layers of a plurality of layers in a previous frame; to determine, upon identifying the adjustment in the one or more layers, a first resource allocation for each of the plurality of layers; to determine, after the determination of the first resource allocation begins, a second resource allocation for each of the plurality of layers; to initiate, upon determining the first resource allocation, an execution of the composition process for each layer in the current frame based on the first resource allocation; and to initiate, upon determining the second resource allocation, an execution of the composition process for each of the layer in at least one subsequent frame based on the second resource allocation.
    Type: Application
    Filed: March 2, 2021
    Publication date: September 8, 2022
    Inventors: Mahesh AIA, Dileep MARCHYA
  • Publication number: 20220108646
    Abstract: Methods, systems, and devices for adaptive display data transfer rate to reduce power consumption during partial frame composition are described. The method may include identifying a set of frames for display on a panel of the device, determining a starting line of an updating frame region of the set of frames in relation to a first pixel line of the panel, determining an ending line of the updating frame region of the set of frames in relation to the first pixel line of the panel, reducing a bus bandwidth vote based on the starting line of the updating frame region, or the ending line of the updating frame region, or a number of lines of the updating frame region, or any combination thereof, and transferring the lines of the updating frame region from a display processor unit to a panel memory at the reduced bus bandwidth.
    Type: Application
    Filed: October 2, 2020
    Publication date: April 7, 2022
    Inventors: Padmanabhan KOMANDURU, V, Dileep MARCHYA, Srinivas PULLAKAVI
  • Patent number: 11238772
    Abstract: The present disclosure relates to methods and apparatus for display processing. The apparatus can determine at least one data parameter corresponding to each of a plurality of layers in a display frame. The apparatus can also calculate a model for the at least one data parameter corresponding to each of the plurality of layers. Additionally, the apparatus can modify the model for the at least one data parameter based on one or more application use cases of the display frame. Moreover, the apparatus can implement the modified model on each of the plurality of layers in the display frame. In some aspects, the apparatus can also determine one or more composition settings for each of the plurality of layers based on the modified model. The apparatus can also apply the one or more composition settings to each of the plurality of layers based on the modified model.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: February 1, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Srinivas Pullakavi, Dileep Marchya, Padmanabhan Komanduru V
  • Publication number: 20220013087
    Abstract: The present disclosure relates to methods and apparatus for display processing. The apparatus can receive a first frame at a frame ready time associated with a current vertical synchronization (Vsync) time period including a first Vsync time and a second Vsync time, the frame ready time may be between the first Vsync time and the second Vsync time, the current Vsync time period may be distinct from one or more application Vsync time periods. The apparatus can also determine one of the one or more application Vsync time periods to align with the current Vsync time period based on the frame ready time. Moreover, the apparatus can adjust an alignment of the current Vsync time period to align with the one of the one or more application Vsync time periods. The apparatus can also adjust the second Vsync time to align the current Vsync time period.
    Type: Application
    Filed: July 8, 2020
    Publication date: January 13, 2022
    Inventors: Dileep MARCHYA, Srinivas PULLAKAVI, Padmanabhan KOMANDURU V
  • Patent number: 11200866
    Abstract: In some aspects, the present disclosure provides a method for generating a frame. The method includes receiving a first fence indicating that a first frame stored in a display processor unit (DPU) buffer has been consumed by a hardware component. The method also includes in response to receiving the first fence, fetching a plurality of layers from an application buffer, the plurality of layers corresponding to a second frame. The method also includes determining to use both a DPU and a graphics processing unit (GPU) to process the plurality of layers for composition of the second frame. The method also includes fetching the first fence from the DPU buffer and generating a second fence.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: December 14, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Dileep Marchya, Sudeep Ravi Kottilingal, Srinivas Pullakavi, Dhaval Kanubhai Patel, Prashant Nukala, Nagamalleswararao Ganji, Mohammed Naseer Ahmed, Mahesh Aia, Kalyan Thota, Sushil Chauhan
  • Publication number: 20210385493
    Abstract: The present disclosure relates to methods and apparatus for display processing. The apparatus can calculate a bandwidth compression ratio (CR) for each of a plurality of tile rows in one or more layers in a frame, each of the one or more layers being associated with one or more regions in the frame. The apparatus can also determine a bandwidth CR for each of the one or more regions associated with each of the one or more layers based on the calculated bandwidth CR for the plurality of tile rows in the one or more layers. Additionally, the apparatus can determine a total bandwidth for the frame based on the determined bandwidth CR for each of the one or more regions associated with the one or more layers. The apparatus can also calculate a total bandwidth for each of the one or more regions.
    Type: Application
    Filed: June 3, 2020
    Publication date: December 9, 2021
    Inventors: Dileep MARCHYA, Dhaval Kanubhai PATEL, Gary Arthur CIAMBELLA, Xian Chi Bobby MAN
  • Publication number: 20210358079
    Abstract: The present disclosure relates to methods and apparatus for display processing. The apparatus can monitor a rendering time for each of a plurality of layers in a display frame. The apparatus can also determine whether a rendering time of one or more layers is greater than a maximum rendering time threshold. The apparatus can also adjust a rendering resolution of the one or more layers when the rendering time of the one or more layers is greater than the maximum rendering time threshold. Moreover, the apparatus can reduce the rendering resolution of the one or more layers when the rendering time of the one or more layers is greater than the maximum rendering time threshold. Also, the apparatus can increase the rendering resolution of the one or more layers when the rendering time of the one or more layers is less than a minimum rendering time threshold.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Padmanabhan KOMANDURU V, Dileep MARCHYA, Srinivas PULLAKAVI
  • Patent number: 11151965
    Abstract: The present disclosure relates to methods and apparatus for display processing. Aspects of the present disclosure can determine a refresh offset for at least one group of lines in a first display based on at least one group of lines in a second display. Aspects of the present disclosure can also apply the refresh offset for the at least one group of lines in the first display based on the at least one group of lines in the second display. Further, aspects of the present disclosure can adjust combined instantaneous bandwidth corresponding to each of the at least one group of lines in the first display and each of the at least one group of lines in the second display based on the applied refresh offset. Aspects of the present disclosure can also determine one or more overlapping layer regions based on the first display and the second display.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: October 19, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Dileep Marchya, Srinivas Pullakavi, Prashant Nukala
  • Publication number: 20210295754
    Abstract: The present disclosure relates to methods and apparatus for display processing. The apparatus can determine at least one data parameter corresponding to each of a plurality of layers in a display frame. The apparatus can also calculate a model for the at least one data parameter corresponding to each of the plurality of layers. Additionally, the apparatus can modify the model for the at least one data parameter based on one or more application use cases of the display frame. Moreover, the apparatus can implement the modified model on each of the plurality of layers in the display frame. In some aspects, the apparatus can also determine one or more composition settings for each of the plurality of layers based on the modified model. The apparatus can also apply the one or more composition settings to each of the plurality of layers based on the modified model.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 23, 2021
    Inventors: Srinivas PULLAKAVI, Dileep MARCHYA, Padmanabhan KOMANDURU V
  • Publication number: 20210183007
    Abstract: Methods, systems, and devices for image processing are described. A device may determine one or more static layers of a layer stack and one or more updating layers of the layer stack. The device may determine an order of the one or more static layers, or the one or more updating layers, or both in the layer stack. In some examples, the device may modify the order in the layer stack by positioning the one or more static layers below the one or more updating layers in the layer stack. Each static layer of the one or more static layers may be associated with a first blending equation and each updating layer of the one or more updating layers may be associated with a second blending equation. As a result, the device may process the layer stack based on the modified order.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 17, 2021
    Inventors: Dileep Marchya, Dhaval Kanubhai Patel, Gopikrishnaiah Andandan
  • Patent number: 10965944
    Abstract: In some aspects, the present disclosure provides a method for bandgap voting. In some configurations, the method includes receiving, at a hardware voting component associated with a destination subsystem, metadata for each of a plurality of compressed display tiles, wherein for each of the plurality of compressed display tiles the metadata indicates an amount of compression of the compressed display tile. In some configurations, the method includes dividing the plurality of compressed display tiles into a plurality of sets of compressed display tiles. In some configurations, for each of the plurality of sets of compressed display tiles, the method includes determining a desired bandwidth for communicating the set of compressed display tiles over a bus, and receiving the set of compressed display tiles at the destination subsystem over the bus at an actual bandwidth that is based on the desired bandwidth.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: March 30, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Gopikrishnaiah Andandan, Dhaval Kanubhai Patel, Dileep Marchya, Nagamalleswararao Ganji
  • Publication number: 20210056933
    Abstract: The present disclosure relates to methods and apparatus for display processing. Aspects of the present disclosure can determine a refresh offset for at least one group of lines in a first display based on at least one group of lines in a second display. Aspects of the present disclosure can also apply the refresh offset for the at least one group of lines in the first display based on the at least one group of lines in the second display. Further, aspects of the present disclosure can adjust combined instantaneous bandwidth corresponding to each of the at least one group of lines in the first display and each of the at least one group of lines in the second display based on the applied refresh offset. Aspects of the present disclosure can also determine one or more overlapping layer regions based on the first display and the second display.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Inventors: Dileep MARCHYA, Srinivas PULLAKAVI, Prashant NUKALA
  • Publication number: 20210006801
    Abstract: In some aspects, the present disclosure provides a method for bandgap voting. In some configurations, the method includes receiving, at a hardware voting component associated with a destination subsystem, metadata for each of a plurality of compressed display tiles, wherein for each of the plurality of compressed display tiles the metadata indicates an amount of compression of the compressed display tile. In some configurations, the method includes dividing the plurality of compressed display tiles into a plurality of sets of compressed display tiles. In some configurations, for each of the plurality of sets of compressed display tiles, the method includes determining a desired bandwidth for communicating the set of compressed display tiles over a bus, and receiving the set of compressed display tiles at the destination subsystem over the bus at an actual bandwidth that is based on the desired bandwidth.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 7, 2021
    Inventors: Gopikrishnaiah ANDANDAN, Dhaval Kanubhai PATEL, Dileep MARCHYA, Nagamalleswararao GANJI
  • Patent number: 10789913
    Abstract: Techniques of this disclosure may include ways to control the amount of graphics data a graphics processing unit (GPU) renders. The GPU may render graphics data for image content that changed from frame-to-frame rather than graphics data for image content that changed and did not change. To display the image content, processing circuitry may map locations of where the graphics data is stored to lines in the image content allowing for the GPU to store the graphics data in arbitrary locations of an application buffer.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: September 29, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Rajesh Yadav, Dileep Marchya
  • Patent number: 10777169
    Abstract: Certain aspects of the present disclosure provide a method for driving a plurality of display panels including a first display panel and a second display panel. The method includes receiving a first synchronization signal from the first display panel. The method further includes receiving a second synchronization signal from the second display panel. The method further includes determining a phase difference between the first synchronization signal and the second synchronization signal. The method further includes computing at least one phase shift offset based on the determined phase difference, the at least one phase shift offset being configured to reduce the phase difference between the first synchronization signal and the second synchronization signal. The method further includes providing a first phase shift offset of the at least one phase shift offset to the first display panel. The method further includes providing a unified synchronization signal to a display processor.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: September 15, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Dileep Marchya, Balamukund Sripada, Srinivas Pullakavi
  • Patent number: 10755666
    Abstract: A method, an apparatus, and a computer-readable medium for wireless communication are provided. In one aspect, an example method may include causing a first region of a display to be refreshed without using a memory of the display, and causing a second region of the display to be refreshed using the memory of the display.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: August 25, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Dileep Marchya, Balamukund Sripada
  • Publication number: 20200225728
    Abstract: A method, an apparatus, and a computer-readable medium for displaying a blinking cursor are provided in a power-efficient manner. Various hardware and protocol command enhancements are provided allowing a visible cursor frame region and an invisible cursor frame region are sequentially displayed creating the blinking cursor effect. Further support is provided for compressed frames, for example, frames compressed with the VESA Display Stream Compression (DSC) standard.
    Type: Application
    Filed: January 15, 2019
    Publication date: July 16, 2020
    Inventors: Dileep MARCHYA, Samson KIM