Abstract: A system for performing analog multiply-and-accumulate (MAC) operations employs at least one cross coupling capacitor processing unit (C3PU). A system includes a wordline to which an analog input voltage is applied, a voltage supply line having a supply voltage (VDD), a bitline, a clock signal line, a current integrator op-amp connected to the bitline and to the clock signal line, and a C3PU connected to the wordline. The C3PU includes a CMOS transistor and a capacitive unit. The capacitive unit includes a cross coupling capacitor and a gate capacitor. The cross coupling capacitor is connected between the wordline and the gate terminal of the CMOS transistor. The gate capacitor is connected between the gate terminal and ground. The CMOS transistor is configured to conduct a current that is proportional to voltage applied to the gate terminal.

Abstract: Digital logic voltage regulators and related methods generate a regulated voltage via controlled switching of a power transistor. A digital logic voltage regulator includes a voltage level comparator, a power transistor, and a charge accumulator. The voltage level comparator generates a digital control signal that alternates between a first voltage level and a second voltage level in response to changes in relative voltage level between the regulated output voltage and the target voltage. The digital control signal causes the power transistor to switch from off to on in response to a reduction of the regulated output voltage relative to the target voltage and causes the power transistor to switch from on to off in response to an increase of the regulated output voltage relative to the target voltage. The charge accumulator decreases variation in the regulated output voltage that would occur without the charge accumulator.

Abstract: A switched capacitor DC-DC converter, which includes a pulse frequency modulation circuit, a multiplexing pulse-width modulation circuit, and a switched capacitive element, is disclosed. The switched capacitive element is coupled between the pulse frequency modulation circuit and the multiplexing pulse-width modulation circuit. The pulse frequency modulation circuit uses a DC source signal to charge the switched capacitive element. The pulse frequency modulation circuit provides a group of output signals by multiplexing the switched capacitive element and reduces reverse current to the switched capacitive element when updating each of the group of output signals.

Abstract: A switched capacitor DC-DC converter, which includes a pulse frequency modulation circuit, a multiplexing pulse-width modulation circuit, and a switched capacitive element, is disclosed. The switched capacitive element is coupled between the pulse frequency modulation circuit and the multiplexing pulse-width modulation circuit. The pulse frequency modulation circuit uses a DC source signal to charge the switched capacitive element. The pulse frequency modulation circuit provides a group of output signals by multiplexing the switched capacitive element and reduces reverse current to the switched capacitive element when updating each of the group of output signals.