Abstract: A method of fabricating a semiconductor structure. According to one aspect of the invention, on a first semiconductor substrate, a first compositionally graded Si1-xGex buffer is deposited where the Ge composition x is increasing from about zero to a value less than about 20%. Then a first etch-stop Si1-yGey layer is deposited where the Ge composition y is larger than about 20% so that the layer is an effective etch-stop. A second etch-stop layer of strained Si is then grown. The deposited layer is bonded to a second substrate. After that the first substrate is removed to release said first etch-stop S1-yGey layer. The remaining structure is then removed in another step to release the second etch-stop layer. According to another aspect of the invention, a semiconductor structure is provided. The structure has a layer in which semiconductor devices are to be formed.

Abstract: A method of fabricating a semiconductor structure. According to one aspect of the invention, on a first semiconductor substrate, a first compositionally graded Si1-xGex buffer is deposited where the Ge composition x is increasing from about zero to a value less than about 20%. Then a first etch-stop Si1-yGey layer is deposited where the Ge composition y is larger than about 20% so that the layer is an effective etch-stop. A second etch-stop layer of strained Si is then grown. The deposited layer is bonded to a second substrate. After that the first substrate is removed to release said first etch-stop Si1-yGey layer. The remaining structure is then removed in another step to release the second etch-stop layer. According to another aspect of the invention, a semiconductor structure is provided. The structure has a layer in which semiconductor devices are to be formed.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1-xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1-yGey layer, a thin strained Si1-zGez layer and another relaxed Si1-yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1-yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1-yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1-xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1-xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1-yGey layer, a thin strained Si1-zGez layer and another relaxed Si1-yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1-yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1-yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1-xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: A method of fabricating a semiconductor structure. According to one aspect of the invention, on a first semiconductor substrate, a first compositionally graded Si1-xGex buffer is deposited where the Ge composition x is increasing from about zero to a value less than about 20%. Then a first etch-stop Si1-yGey layer is deposited where the Ge composition y is larger than about 20% so that the layer is an effective etch-stop. A second etch-stop layer of strained Si is then grown. The deposited layer is bonded to a second substrate. After that the first substrate is removed to release said first etch-stop Si1-yGey layer. The remaining structure is then removed in another step to release the second etch-stop layer. According to another aspect of the invention, a semiconductor structure is provided. The structure has a layer in which semiconductor devices are to be formed.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1-xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1-yGey layer, a thin strained Si1-zGez layer and another relaxed Si1-yGey layer. Hydrogen ions are then introduced into the strained SizGz layer. The relaxed Si1-yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1-yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1-xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth.

Abstract: Improvements on the graphoepitaxial process for obtaining epitaxial or preferred orientation films are described wherein a cap of material is formed over the film to be oriented, artificial surface-relief structure may be present in the substrate, the cap, or both, and the film may be heated by irradiation with electromagnetic radiation.