Patents by Inventor Dimitri Lederer

Dimitri Lederer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260237911
    Abstract: Microwave radiation unit comprises a refractive beamformer and at least one transmission line connected to the refractive beamformer by a transition structure. The at least one transition structure comprises a coupling structure and a waveguide having a main travel direction. The refractive beamformer and the waveguide each comprise parallel metallic layers and solid dielectric body between the parallel metallic layers. The solid dielectric body of the waveguide and the solid dielectric body of the beamformer comprise at least one common connecting layer of one solid dielectric material extending from the waveguide into the refractive beamformer so that the solid dielectric body of the waveguide and the solid dielectric body of the beamformer merge at least partially into each other. The at least one common connecting layer extends over the whole lateral extension of the solid dielectric body of the waveguide and the solid dielectric body of the beamformer.
    Type: Application
    Filed: January 26, 2024
    Publication date: August 13, 2026
    Inventors: Vincent KASCHTEN, Dimitri LEDERER, Christophe CRAEYE, Alain Louis ZAMBON
  • Publication number: 20260221667
    Abstract: The invention refers to a radiation unit comprising a lens (10) having a dielectric refractive lens body (12) that transfers electromagnetic waves. The invention is characterized in that the dielectric refractive lens body (12) has a first relative permittivity ?centre the center and a second relative permittivity ?peripheral edge in the edge region of the lens, where the first relative permittivity ?centre and the second relative permittivity ?peripheral edge are related by the relation ?centre=1.42 ??peripheral edge+0.58, with a tolerance of 0.2, where |?peripheral edge??centre|>0.1 and ?peripheral edge>1.5.
    Type: Application
    Filed: January 26, 2024
    Publication date: July 30, 2026
    Applicant: BEA SA
    Inventors: Vincent KASCHTEN, Christophe CRAEYE, Dimitri LEDERER, Alain Louis ZAMBON
  • Publication number: 20210280703
    Abstract: Structures including a buffer layer and methods of forming a structure including a buffer layer. A layer stack is formed on a semiconductor substrate. The layer stack includes a buffer layer and a charge-trapping layer. The buffer layer is composed of a III-V compound semiconductor material, and the charge-trapping layer is positioned between the semiconductor substrate and the buffer layer.
    Type: Application
    Filed: March 3, 2020
    Publication date: September 9, 2021
    Inventors: Bartlomiej J. Pawlak, Dimitri Lederer
  • Patent number: 7585748
    Abstract: The invention relates to a process for manufacturing a multilayer structure made from semiconducting materials that include an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The process includes the step of modifying the density of carrier traps or the electrical charge within the electrically insulating layer in order to minimize electrical losses in the structure support layer.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: September 8, 2009
    Assignees: S.O.I.Tec Silicon on Insulator Technologies, Université Catholique de Louvain
    Inventors: Jean-Pierre Raskin, Dimitri Lederer, François Brunier
  • Publication number: 20070032040
    Abstract: The present invention provides a method of manufacturing a multilayer semiconductor structure featuring reduced ohmic losses with respect to standard multilayer semiconductor structures. The semiconductor structure comprises a high resistivity silicon substrate with resistivity higher than 3 K?.cm, an active semiconductor layer and an insulating layer in between the silicon substrate and the active semiconductor layer. The method comprises suppressing ohmic losses inside the high resistivity silicon substrate by increasing, with regard to prior art devices, charge trap density between the insulating layer and the silicon substrate. In particular this may be obtained by applying an intermediate layer in between the silicon substrate and the insulating layer, the intermediate layer comprising grains having a size, wherein the mean size of the grains of the intermediate layer is smaller than 150 nm, preferably smaller than 50 nm.
    Type: Application
    Filed: September 27, 2004
    Publication date: February 8, 2007
    Inventor: Dimitri Lederer
  • Publication number: 20060166451
    Abstract: The invention relates to a process for manufacturing a multilayer structure made from semiconducting materials that include an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The process includes the step of modifying the density of carrier traps or the electrical charge within the electrically insulating layer in order to minimize electrical losses in the structure support layer.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 27, 2006
    Inventors: Jean-Pierre Raskin, Dimitri Lederer, Francois Brunier