Abstract: Structures including a buffer layer and methods of forming a structure including a buffer layer. A layer stack is formed on a semiconductor substrate. The layer stack includes a buffer layer and a charge-trapping layer. The buffer layer is composed of a III-V compound semiconductor material, and the charge-trapping layer is positioned between the semiconductor substrate and the buffer layer.

Abstract: The invention relates to a process for manufacturing a multilayer structure made from semiconducting materials that include an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The process includes the step of modifying the density of carrier traps or the electrical charge within the electrically insulating layer in order to minimize electrical losses in the structure support layer.

Abstract: The present invention provides a method of manufacturing a multilayer semiconductor structure featuring reduced ohmic losses with respect to standard multilayer semiconductor structures. The semiconductor structure comprises a high resistivity silicon substrate with resistivity higher than 3 K?.cm, an active semiconductor layer and an insulating layer in between the silicon substrate and the active semiconductor layer. The method comprises suppressing ohmic losses inside the high resistivity silicon substrate by increasing, with regard to prior art devices, charge trap density between the insulating layer and the silicon substrate. In particular this may be obtained by applying an intermediate layer in between the silicon substrate and the insulating layer, the intermediate layer comprising grains having a size, wherein the mean size of the grains of the intermediate layer is smaller than 150 nm, preferably smaller than 50 nm.

Abstract: The invention relates to a process for manufacturing a multilayer structure made from semiconducting materials that include an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The process includes the step of modifying the density of carrier traps or the electrical charge within the electrically insulating layer in order to minimize electrical losses in the structure support layer.