Patents by Inventor Din-How Mei

Din-How Mei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Capping dielectric structures for transistor gates
    Patent number: 9490347
    Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventors: Aaron W. Rosenbaum, Din-How Mei, Sameer S. Pradhan
  • CAPPING DIELECTRIC STRUCTURES FOR TRANSISTOR GATES
    Publication number: 20160049499
    Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.
    Type: Application
    Filed: October 28, 2015
    Publication date: February 18, 2016
    Applicant: INTEL CORPORATION
    Inventors: Aaron W. Rosenbaum, Din-How Mei, Sameer S. Pradhan
  • Capping dielectric structure for transistor gates
    Patent number: 9202699
    Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: December 1, 2015
    Assignee: Intel Corporation
    Inventors: Aaron W. Rosenbaum, Din-How Mei, Sameer S. Pradhan
  • CAPPING DIELECTRIC STRUCTURE FOR TRANSISTOR GATES
    Publication number: 20130248952
    Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.
    Type: Application
    Filed: September 30, 2011
    Publication date: September 26, 2013
    Inventors: Aaron W. Rosenbaum, Din-How Mei, Sameer S. Pradhan
  • METHOD TO DEPOSIT SILICON FILM ON A SUBSTRATE
    Publication number: 20080237660
    Abstract: A semiconductor device and a method to fabricate a semiconductor device on a silicon substrate are illustrated. The semiconductor may comprise an amorphous silicon film, in the source/drain region of a semiconductor, having low amount of hydrogen and high concentration of carbon and phosphorous, which enhances performance of the semiconductor device.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Ajay K. Sharma, Anand Murthy, Din-How Mei, Dennis Hanken