Abstract: An integrated circuit can include a processor configured to execute program code and a plurality of peripheral circuit blocks coupled to the processor. The plurality of peripheral circuit blocks are controlled by the processor as a master. The integrated circuit also can include a governor circuit coupled to the plurality of peripheral circuit blocks. The governor circuit is configured to monitor operation of the plurality of peripheral circuit blocks for known error states and, in response to detecting an occurrence of a selected known error state of the known error states in a selected peripheral circuit block of the plurality of peripheral circuit blocks, perform a predetermined action on the selected peripheral circuit block.

Abstract: Examples described herein include an error report throttling mechanism for Peripheral Component Interconnect Express (PCIe) systems. The throwing mechanism updates an interrupt for the first port, and selectively performs an interrupt routine, in response to detecting the error message, based at least in part on the interrupt count for the first port. For example, the throwing mechanism may compare the interrupt count with a reporting threshold to determine whether an error reporting limit has been exceeded for the first port. Upon determining that the error reporting limit has been reached, the throttling mechanism may disable the interrupt routine for subsequent error messages received at the first port.