Patents by Inventor Dinesh Saigal

Dinesh Saigal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240012393
    Abstract: In embodiments, a method includes receiving, by a processing device, first sensor data generated by a plurality of sensors of a process chamber of a manufacturing system during execution of a fabrication process. The method includes receiving, by the processing device, second sensor data generated by one or more external sensors that are not components of the process chamber during execution of the fabrication process. The method includes determining, by the processing device, environmental resource usage data indicative of an environmental resource consumption of the fabrication process run on the process chamber based on the first sensor data and the second sensor data. The method includes providing, by the processing device, the environmental resource usage data for display on a graphical user interface (GUI).
    Type: Application
    Filed: November 4, 2022
    Publication date: January 11, 2024
    Inventors: Ala Moradian, Aleksey Yanovich, Orlando Trejo, Elizabeth Neville, Dinesh Saigal, Umesh Madhav Kelkar
  • Patent number: 11011676
    Abstract: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: May 18, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Mingwei Zhu, Rongjun Wang, Nag B. Patibandla, Xianmin Tang, Vivek Agrawal, Cheng-Hsiung Tsai, Muhammad Rasheed, Dinesh Saigal, Praburam Gopal Raja, Omkaram Nalamasu, Anantha Subramani
  • Publication number: 20190196461
    Abstract: A system, apparatus and method for internet-based health and diagnostic monitoring of semiconductor manufacturing components include receiving health and diagnostic information and data from at least one component of a semiconductor manufacturing system, evaluating the received health and diagnostic information and data to determine if at least one of the at least one component of the semiconductor manufacturing system for which the health and diagnostic information and data was received is faulty, and if determined that at least one of the at least one component of the semiconductor manufacturing system is faulty, initiating a corrective action for the faulty component over the internet.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Inventors: DINESH SAIGAL, SARIL RAGHU, ALFRED LINKE, AN BAO TRAN, GIL ONTIVEROS, JOHN C. FORSTER, WARREN WOODS
  • Publication number: 20160293798
    Abstract: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.
    Type: Application
    Filed: June 15, 2016
    Publication date: October 6, 2016
    Inventors: Mingwei Zhu, Rongjun Wang, Nag B. Patibandla, Xianmin Tang, Vivek Agrawal, Cheng-Hsiung Tsai, Muhammad Rasheed, Dinesh Saigal, Praburam Gopal Raja, Omkaram Nalamasu, Anantha Subramani
  • Patent number: 9396933
    Abstract: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: July 19, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Mingwei Zhu, Rongjun Wang, Nag B. Patibandia, Xianmin Tang, Vivek Agrawal, Cheng-Hsiung Tsai, Muhammad Rasheed, Dinesh Saigal, Praburam Gopal Raja, Omkaram Nalamasu, Anantha Subramani
  • Publication number: 20130285065
    Abstract: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.
    Type: Application
    Filed: April 23, 2013
    Publication date: October 31, 2013
    Inventors: Mingwei Zhu, Rongjun Wang, Nag B. Patibandla, Xianmin Tang, Vivek Agrawal, Cheng-Hsiung Tsai, Muhammad Rasheed, Dinesh Saigal, Praburam Gopal Raja, Omkaram Nalamasu, Anantha Subramani
  • Publication number: 20050247554
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as nickel and cobalt, for example, and its method of use, in which self-ionized plasma (SIP) sputtering is promoted. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. One embodiment of the present inventions is directed to sputter depositing a metal layer by biasing a sputter target with pulsed power in which the power applied to the target alternates between low and high levels. The high levels are, in one embodiment, sufficiently high to maintain a plasma for ionizing deposition material. The low levels are, in one embodiment, sufficiently low such that the power applied to the target during the high and low levels is, on average, low enough to facilitate deposition of thin layers if desired.
    Type: Application
    Filed: February 23, 2005
    Publication date: November 10, 2005
    Inventors: Dinesh Saigal, John Forster, Shuk Lai
  • Publication number: 20040112735
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as nickel and cobalt, for example, and its method of use, in which self-ionized plasma (SIP) sputtering is promoted. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. One embodiment of the present inventions is directed to sputter depositing a metal layer by biasing a sputter target with pulsed power in which the power applied to the target alternates between low and high levels. The high levels are, in one embodiment, sufficiently high to maintain a plasma for ionizing deposition material. The low levels are, in one embodiment, sufficiently low such that the power applied to the target during the high and low levels is, on average, low enough to facilitate deposition of thin layers if desired.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Dinesh Saigal, John C. Forster, Shuk Ying Lai
  • Publication number: 20030116432
    Abstract: Embodiments of the invention provide a processing apparatus having a lower reactor portion, an adjustable reactor wall portion attached to an upper portion of the lower reactor portion, the adjustable reactor wall portion being configured for selective linear expansion and contraction, and a source assembly positioned above the adjustable reactor wall portion. The cooperative operation of the source, adjustable wall, and the lower reactor creates a processing apparatus wherein the throw distance may be varied without disassembly of the reactor.
    Type: Application
    Filed: December 26, 2001
    Publication date: June 26, 2003
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Marc O. Schweitzer, Dinesh Saigal, Alan Liu
  • Patent number: 6579783
    Abstract: Embodiments of the present invention generally relate to processes of making an improved salicide-gate. One embodiment of a method for forming a feature on a substrate comprises forming a gate structure on a substrate; forming spacers by the sidewalls of the gate; and depositing a relatively thin metal film, such as cobalt or titanium, over the gate at a high temperature.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: June 17, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Dinesh Saigal, Shuk Ying Lai
  • Patent number: 6454919
    Abstract: A physical vapor deposition apparatus is provided with at least one workpiece processing chamber and a programmable control device for controlling process variables within the processing chamber. The control device is programmed to vary the power to an aluminum sputtering target during deposition of aluminum layers. By controlling the applied power, the rate of deposition of the aluminum is varied in a manner which reduces or avoids the creation of voids during the filling of high aspect ratio features.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: September 24, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Arvind Sundarrajan, Dinesh Saigal
  • Patent number: 6426282
    Abstract: A method of forming solder bumps on a semiconductor wafer utilizing a low temperature biasable electrostatic chuck. In particular, the method comprises the steps of providing at least one bond pad on the semiconductor wafer, forming a barrier layer over the bond pad, and forming the solder bumps upon the at least one bond pad. By controlling the temperature and biasing of the electrostatic chuck, the barrier layer, such as nickel vanadium, exhibits a low tensile or compressive stress.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: July 30, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Dinesh Saigal, Shankarram Athreya, Kenny King-Tai Ngan, Lisa L. Yang
  • Patent number: 6375743
    Abstract: A method and apparatus for baking-out and for cooling a vacuum chamber are provided. In a first aspect, an inert gas which conducts heat from the vacuum chamber's bake-out lamps to the shield and from the shield to the other parts within the vacuum chamber is introduced to the chamber during chamber bake-out. The inert gas preferably comprises argon, helium or nitrogen and preferably raises the chamber pressure to about 500 Torr during chamber bake-out. A semiconductor processing apparatus also is provided having a controller programmed to perform the inventive bake-out method. In a second aspect, a process chamber is provided having at least one source of a cooling gas. The cooling gas is input to the chamber and is allowed to thermally communicate with the chamber body and components. The cooling gas may reside in the chamber for a period of time or may be continuously flowed through the chamber. Once the chamber reaches a target temperature the cooling gas is evacuated.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: April 23, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Arvind Sundarrajan, Dinesh Saigal, Peijun Ding
  • Publication number: 20020019119
    Abstract: The present invention generally relates to an improved salicide-gate and process of making an improved salicide-gate. One embodiment of the process comprises forming a gate structure on a substrate; forming spacers by the sidewalls of the gate; and depositing a relatively thin metal film, such as cobalt or titanium, over the gate at a high temperatures.
    Type: Application
    Filed: July 6, 2001
    Publication date: February 14, 2002
    Inventors: Dinesh Saigal, Shuk Ying Lai
  • Publication number: 20010029888
    Abstract: A method and apparatus for baking-out and for cooling a vacuum chamber are provided. In a first aspect, an inert gas which conducts heat from the vacuum chamber's bake-out lamps to the shield and from the shield to the other parts within the vacuum chamber is introduced to the chamber during chamber bake-out. The inert gas preferably comprises argon, helium or nitrogen and preferably raises the chamber pressure to about 500 Torr during chamber bake-out. A semiconductor processing apparatus also is provided having a controller programmed to perform the inventive bake-out method. In a second aspect, a process chamber is provided having at least one source of a cooling gas. The cooling gas is input to the chamber and is allowed to thermally communicate with the chamber body and components. The cooling gas may reside in the chamber for a period of time or may be continuously flowed through the chamber. Once the chamber reaches a target temperature the cooling gas is evacuated.
    Type: Application
    Filed: November 29, 2000
    Publication date: October 18, 2001
    Inventors: Arvind Sundarrajan, Dinesh Saigal, Peijun Ding, James van Gogh
  • Patent number: 6193811
    Abstract: Methods for baking-out and for cooling a vacuum chamber are provided. In a first aspect, an inert gas which conducts heat from the vacuum chamber's bake-out lamps to the shield and from the shield to the other parts within the vacuum chamber is introduced to the chamber during chamber bake-out. The inert gas preferably comprises argon, helium or nitrogen and preferably raises the chamber pressure to about 500 Torr during chamber bake-out. A semiconductor processing apparatus also is provided having a controller programmed to perform the inventive bake-out method. In a second aspect, a process chamber is provided having at least one source of a cooling gas. The cooling gas is input to the chamber and is allowed to thermally communicate with the chamber body and components. The cooling gas may reside in the chamber for a period of time or may be continuously flowed through the chamber. Once the chamber reaches a target temperature the cooling gas is evacuated.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: February 27, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Arvind Sundarrajan, Dinesh Saigal, Peijun Ding, James van Gogh
  • Patent number: 6177350
    Abstract: The present disclosure pertains to our discovery that a specialized set of process variables will enable the performance of second layer aluminum metallization of multi-layered semiconductor structures within a single processing chamber, without the need for deposition of a nucleation layer of aluminum, and without the need for a reflow step to fill voids formed during metallization. In general, the improved method of the invention includes the following steps: (a) sputter etching the patterned dielectric surface; (b) depositing at least one continuous wetting layer of titanium over the patterned dielectric surface using ion sputter deposition, the wetting layer having a thickness within the range of about 25 Å to about 200 Å on the sidewall of a contact via formed in the substrate; and (c) depositing a layer of aluminum over the titanium wetting layer using traditional sputter deposition at a substrate temperature within the range of about 380° C. to about 500° C.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: January 23, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Arvind Sundarrajan, Dinesh Saigal