Patents by Inventor Dinesh Sundararajan Kalakkad

Dinesh Sundararajan Kalakkad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140154893
    Abstract: The present invention is an electrical connector in which a substrate (such as a printed circuit board or PCB) includes a plurality of apertures (or vias) and some of those apertures are filled with two materials to improve the characteristics of the electrical interconnection. The preferred process of crating the filled vias includes the steps of plating the vias with an electrically-conductive material to create an electrically-conductive path between portions of the substrate and components associated with the substrate and partially filling the apertures, then filling at least a portion of the apertures or vias with a second or different filling material to seal at least apart of the electrically conductive path through the plating. The second filling material may be chosen to provide thermal compensation for the connection.
    Type: Application
    Filed: February 4, 2014
    Publication date: June 5, 2014
    Applicant: Neoconix, Inc.
    Inventors: David Noel Light, Dinesh Sundararajan Kalakkad, Peter Tho Nguyen
  • Patent number: 8641428
    Abstract: The present invention is an electrical connector in which a substrate (such as a printed circuit board or PCB) includes a plurality of apertures (or vias) and some of those apertures are filled with two materials to improve the characteristics of the electrical interconnection. The preferred process of crating the filled vias includes the steps of plating the vias with an electrically-conductive material to create an electrically-conductive path between portions of the substrate and components associated with the substrate and partially filling the apertures, then filling at least a portion of the apertures or vias with a second or different filling material to seal at least apart of the electrically conductive path through the plating. The second filling material may be chosen to provide thermal compensation for the connection.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: February 4, 2014
    Assignee: Neoconix, Inc.
    Inventors: David Noel Light, Dinesh Sundararajan Kalakkad, Peter Tho Nguyen
  • Publication number: 20130143420
    Abstract: The present invention is an electrical connector in which a substrate (such as a printed circuit board or PCB) includes a plurality of apertures (or vias) and some of those apertures are filled with two materials to improve the characteristics of the electrical interconnection. The preferred process of crating the filled vias includes the steps of plating the vias with an electrically-conductive material to create an electrically-conductive path between portions of the substrate and components associated with the substrate and partially filling the apertures, then filling at least a portion of the apertures or vias with a second or different filling material to seal at least apart of the electrically conductive path through the plating. The second filling material may be chosen to provide thermal compensation for the connection.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 6, 2013
    Inventors: David Noel Light, Dinesh Sundararajan Kalakkad, Peter Tho Nguyen