Abstract: A gene detection substrate is provided, including: a substrate; a gene detection channel in the substrate, an opening of the gene detection channel is on one side of the substrate; the gene detection channel includes a sample injection groove, a sample outgoing groove and a flow channel groove sequentially connected and communicated with each other; the flow channel groove includes reaction holes and flow channel structures; the reaction holes are distributed at intervals, and any two adjacent reaction holes are communicated with each other through the flow channel structure; the flow channel structure includes a first, second, and third sub-grooves sequentially connected and communicated with each other; a width of each of the first and third sub-grooves in a first direction is smaller than that of the second sub-groove in the first direction; and the first direction is perpendicular to an arrangement direction of two adjacent reaction holes.

Abstract: A display panel is provided. The display panel includes a plurality of functional unit groups arranged in a display area. Each functional unit group includes at least one functional unit. Each functional unit is electrically connected to a first signal transmission line. A signal shielding line is disposed between the first signal transmission lines of a same functional unit group and a functional units of an adjacent functional unit group to solve a problem of poor touch performance caused by signal interference in existing touch solutions.

Abstract: This disclosure relates generally to image coding and particularly to methods and systems for neural image compression (NIC). The disclosed NIC decoder/encoder may include various neural network components that are configured to achieve a balance between network complexity and coding efficiency. Such a NIC decoder/encoder implementation particularly include a core decoder and a hyper decoder each including a neural network architecture adapted for achieving a lightweight decoder/encoder.

Abstract: A chip packaging structure and a chip packaging method, the structure including: a sample substrate with through holes; first and second cover plates on opposite sides of the sample substrate; and at least one pair of a sample inlet and a sample outlet, each pair of the sample inlet and the sample outlet is in one or both of the first cover plate and the second cover plate, a flow path is between each pair of the sample inlet and the sample outlet, a first flow channel structure is on a surface of the first cover plate opposite to the sample substrate, a second flow channel structure is on a surface of the second cover plate opposite to the sample substrate, and the first flow channel structure and the second flow channel structure are connected with the through holes, to form a continuous channel corresponding to the flow path.

Abstract: A culture structure, a culture method and a culture chip are provided. The culture structure includes a culture plate and a vibration structure provided on the culture plate; the culture plate includes a plurality of accommodating structures configured to accommodate culture solution; the vibration structure includes a vibration signal generating structure and a plurality of vibration members; the vibration signal generating structure is configured to generate a vibration signal; the plurality of vibration members are connected to the vibration signal generating structure and configured to drive the culture solution in the plurality of accommodating structures to move according to the vibration signal.

Abstract: A detection chip and a manufacturing method thereof, and a detection method are provided. The detection chip includes: a base substrate, and a detection layer, provided on the base substrate and including a plurality of detection holes. An inner wall of each of at least part of detection holes among the plurality of detection holes is hydrophilic, and a contact angle of the inner wall is within 30 degrees.

Abstract: A method and apparatus comprising computer code configured to cause a processor or processors to receive a video bitstream comprising a current block in a current picture and reconstruct the current block by transforming the current block by a neural network comprising a plurality of upsample modules and activation modules, and at least one of the activation modules includes a LeakyReLu function and a convolution function.

Abstract: A method and apparatus comprising computer code configured to cause a processor or processors to receive a video bitstream comprising a current block in a current picture and reconstruct the current block by transforming the current block by a neural network comprising a plurality of upsample modules and activation modules, and at least one of the upsample modules includes a convolution layer and a pixel shuffle layer, and at least one of the activation modules includes a LeakyReLu function and a convolution function.

Abstract: The present disclosure provides a microfluidic chip, a method of controlling the flow velocity of a fluid in the microfluidic chip, and a method of using the microfluidic chip. The microfluidic chip includes at least one shunt structure, each shunt structure includes at least two channels each including a first channel and a second channel, the first channel is configured to allow the first fluid to flow therein, the second channel is configured to allow the second fluid to flow therein, and the first fluid and the second fluid merge at the first confluence of the microfluidic chip. The first channel has a first cross-section and a first length, the second channel has a second cross-section and a second length, the area of the first cross-section is greater than or equal to the area of the second cross-section, and the first length is less than or equal to second length.

Abstract: Example base station determining methods and example servers are disclosed, where the solution is used to determine an out-of-synchronization base station in a network. In one example, at least one synchronization domain is determined, where any two neighboring base stations in the synchronization domain are in a relative clock synchronization relationship. Then, a first synchronization domain is determined based on the at least one synchronization domain, where each base station in the first synchronization domain is a synchronization base station. A second synchronization domain that is in the at least one synchronization domain and that has a relative clock out-of-synchronization relationship with the first synchronization domain is then determined, to determine that each base station in the second synchronization domain is an out-of-synchronization base station.

Abstract: The present application provides a polymer microsphere and a preparing method thereof. The polymer microsphere includes a core and a shell coating the core; the core includes at least two magnetic particles and a dispersion located between two neighboring magnetic particles; the shell includes a main shell body and a modifying layer, and the modifying layer is located on one side of the main shell body that is away from the magnetic particles; and a material of the dispersion, a material of the main shell body and a material of the modifying layer are the same. The magnetic particles in the polymer microsphere have a good dispersibility, and, when heated, the magnetic attraction force and the magnetic responsiveness of the polymer microsphere can nearly maintain unchanged.

Abstract: Provided are a microfluidic chip and a usage method thereof, and a microfluidic system. The microfluidic chip includes a substrate layer, the substrate layer includes a substrate and a drive electrode layer; and a cover plate layer arranged opposite the substrate layer, a space between the cover plate layer and the substrate layer form a solution accommodating space; the cover plate layer includes a solution inlet hole, a solution outlet hole, and limiting recesses arranged on a side of the cover plate layer facing the substrate layer, the solution inlet hole, the solution outlet hole and each limiting recess are in communication with the solution accommodating space, and an end surface of the solution inlet hole adjacent to the substrate layer, an end surface of the solution outlet hole adjacent to the substrate layer, and opening surfaces of the plurality of limiting recesses are arranged substantially flush with one another.

Abstract: The present disclosure provides a micro-fluidic chip and a reaction system. The micro-fluidic chip includes: a base substrate; a micro-cavity defining layer on the base substrate and defining a plurality of micro-reaction chambers; a cover plate on a side of the micro-cavity defining layer away from the base substrate; a heating layer disposed between the micro-cavity defining layer and one of the base substrate and the cover plate, and configured to heat the plurality of micro-reaction chambers. One of the base substrate and the cover plate, which is away from the heating layer, has a first surface and a second surface, the first surface faces the heating layer, the second surface faces away from the heating layer, and a area of the second surface is larger than that of the first surface.

Abstract: A centrifugal structure member of a microfluidic chip and a centrifuge are provided. The centrifugal structure member of a microfluidic chip includes: a connecting portion (10) configured to connect to a rotor of a centrifuge; a support portion (20) fixedly connected or integrally formed with the connecting portion (10), and having an inclined outer surface forming an included angle with the rotation axis (50) of the rotor of the centrifuge; and a mounting portion (30) connected with or formed on the inclined outer surface, and configured to detachably mount the microfluidic chip (40) on the support portion (20).

Abstract: Aspects of the disclosure provide methods and apparatuses, for video decoding and encoding. The apparatus includes processing circuitry configured to receive an image/video comprising one or more blocks and metadata for a machine task associated with the image/video. The metadata specifies neural network post-filtering characteristics for machine consumption. The processing circuitry decodes a first post-filtering parameter in the image/video corresponding to the one or more blocks to be reconstructed. The first post-filtering parameter applies to a block in the one or more blocks and has been updated by a post-filtering module in a post-filtering neural network (NN) that is trained based on a training dataset and the metadata. The processing circuitry determines the post-filtering NN in a video decoder corresponding to the one or more blocks based on the first post-filtering parameter, and decodes the block based on the determined post-filtering NN corresponding to the block and the metadata.

Abstract: The disclosure provides a microfluidic chip, a droplet generation device and a method for controlling a droplet generation size. The microfluidic chip includes a substrate and a first flow channel, a second flow channel and a third flow channel distributed on the substrate, the first flow channel, the second flow channel and the third flow channel intersecting to form a confluence area, the first flow channel being configured for a flow of a dispersed phase fluid from it, the second flow channel being configured for a flow of a continuous phase fluid from it, the dispersed phase fluid and the continuous phase fluid forming droplets in the third flow channel. The dispersed phase fluid flows in the first flow channel along a first direction, an orthographic projection of the first flow channel on the substrate has a first width which is constant in a second direction.

Abstract: Provided are a battery assembly and a manufacturing method thereof. the battery assembly includes: an anode unit, which includes an anode current collector and an anode on the anode current collector, an electrolyte layer on a side of the anode remote from the anode current collector; and a cathode unit on a side of the electrolyte layer remote from the anode; the battery assembly further includes: an interface layer formed at a contact interface between the anode current collector and the anode.

Abstract: A method of block-wise neural image compression with post filtering is performed by at least one processor of an encoder and includes encoding a block of an input image, using a first neural network, wherein the encoded block is decoded by a decoder using a second neural network to generate a reconstructed block, and performing intra-prediction on the reconstructed block, using a third neural network, to generate a predicted block. The method further includes determining a difference between the block of the input image and the generated predicted block, to generate a prediction residual, encoding the generated prediction residual, using a fourth neural network, wherein the encoded prediction residual is decoded by the decoder using a fifth neural network, and adding the decoded prediction residual to the generated predicted block, to generate a recovered predicted block.

Abstract: Aspects of the disclosure provide a method, an apparatus, and a non-transitory computer-readable storage medium for video decoding. The apparatus can include processing circuitry. The processing circuitry is configured to reconstruct blocks of an image from a coded video bitstream. The processing circuitry can perform post-processing on one of a plurality of regions of first two neighboring reconstructed blocks of the reconstructed blocks with at least one post-processing neural network (NN). The first two neighboring reconstructed blocks have a first shared boundary and include a boundary region having samples on both sides of the first shared boundary. The plurality of regions of the first two neighboring reconstructed blocks includes the boundary region and non-boundary regions that are outside the boundary region. The one of the plurality of regions is replaced with the post-processed one of the plurality of regions of the first two neighboring reconstructed blocks.

Abstract: A microfluidic flow channel structure and a microfluidic chip are described. The microfluidic flow channel structure includes a main chamber, wherein the main chamber includes at least two division zones and a reaction zone, and the at least two division zones are respectively connected with the reaction zone, wherein each division zone includes a first division wall, and the first division wall is provided with an opening for liquid inlet; a diversion structure is arranged at the opening of at least one division zone, and the diversion structure at least includes a first diversion wall, which is arranged opposite the first division wall; a first division channel is formed between the first diversion wall and the first division wall, and the first division channel includes at least two liquid outlets.