Abstract: In a method of video decoding, a coded video bitstream including coded information of a plurality of coded pictures is received. The coded information includes a supplemental enhancement information (SEI) message associated with a first picture and a second picture in the plurality of coded pictures, and the SEI message includes a syntax element indicative of a truncation function that converts the first picture of a first bit depth to a second picture of a second bit depth, the second bit depth being lower than the first bit depth. In the method, a reconstructed picture corresponding to the second picture is generated. The reconstructed picture includes corresponding reconstructed samples based on the coded information. A range of sample values of the reconstructed samples of the reconstructed picture is determined by the truncation function.

Abstract: A device and a driving method for driving a microfluidic chip are disclosed. The device for driving a microfluidic chip includes a carrying member configured to carry the microfluidic chip; a releasing member configured to electrically connected to the microfluidic chip, and control the release of the reagent of the microfluidic chip, a valve control member configured to control the opening and closing of the flow channel in the valve control area of the microfluidic chip when the valve control area is within the valve control range of the valve control member, a fluid driving member configured to drive the flow of fluid in the microfluidic chip, and a controller configured to control the driving process of the microfluidic chip.

Abstract: The present disclosure provide a detection chip having at least one functional region, the functional region including: a reaction region and a non-reaction region surrounding the reaction region. The detection chip includes: a first substrate and a second substrate opposite to each other. In the reaction region, a side of the first substrate facing the second substrate is provided with reaction grooves arranged in an array along a first direction and a second direction; first communication grooves each between two reaction grooves adjacent in the first direction, and connected with the two reaction grooves; and second communication grooves each between two first communication grooves adjacent in the second direction, and connected with the two adjacent first communication grooves, and the first direction intersects the second direction. The embodiments of the present disclosure further provide a fabrication method and a sample introduction method of the detection chip.

Abstract: A microfluidic flow channel structure and a microfluidic chip are described. The microfluidic flow channel structure includes a main chamber, wherein the main chamber includes at least two division zones and a reaction zone, and the at least two division zones are respectively connected with the reaction zone, wherein each division zone includes a first division wall, and the first division wall is provided with an opening for liquid inlet; a diversion structure is arranged at the opening of at least one division zone, and the diversion structure at least includes a first diversion wall, which is arranged opposite the first division wall; a first division channel is formed between the first diversion wall and the first division wall, and the first division channel includes at least two liquid outlets.

Abstract: Iterative content-adaptive online training for end-to-end (E2E) neural image compression (NIC) using a neural network performed by at least one processor, is provided, including receiving an input image, to an E2E NIC framework, fine-tuning the E2E NIC framework, based on the input image, computing parameter updates using a first neural network of the fine-tuned E2E NIC framework, enhancing the fine-tuned E2E NIC framework based on a second neural network, the second neural network being a post-enhancement network, and generating an updated E2E NIC framework, based on the enhanced E2E NIC framework and the parameter updates.

Abstract: The present application provides a display panel, a fabrication method thereof, and a mobile terminal. The display panel includes a substrate and a driving circuit layer. The driving circuit layer includes a first active layer, a first gate insulating layer, a first gate, a first interlayer insulating layer, and a source and drain layer. An orthographic projection of the first gate insulating layer on the substrate is within an orthographic projection of the first active layer on the substrate, and an orthographic projection the first gate on the substrate is located within an orthographic projection of the first gate insulating layer on the substrate.

Abstract: An MEMS pressure sensor, a method for manufacturing an MEMS pressure sensor, and a pressure detection device are provided. The MEMS pressure sensor includes: an adapter board; an integrated circuit chip on one side of the adapter board; and a sensor chip on a side of the adapter board away from the integrated circuit chip. The sensor chip includes a first electrode and a second electrode, and the first electrode is between the adapter board and the second electrode; the second electrode includes a pressure-sensitive portion opposite to the first electrode and an edge portion surrounding the pressure-sensitive portion, the edge portion is fixed onto the adapter board by a bonding layer, and the first electrode, the second electrode, the bonding layer and the adapter board define a cavity. The first and second electrodes of the sensor chip are electrically connected to the integrated circuit chip through the adapter board.

Abstract: This disclosure relates generally to sample clipping in video or image and particularly to methods and systems for sample clipping in video or image based on Low Dynamic Range (LDR) coding. For example, an encoder or decoder may determine a sample clipping range for a bock and apply a sample clipping procedure based on the sample clipping range during one of various stages of encoding or decoding process of the block. The sample clipping range may be derived from an LDR selected for encoding the block.

Abstract: The present disclosure provides a detection chip, including: a micro-cavity-defining layer having a plurality of micro-pores extending through the micro-cavity-defining layer are arranged; and a ventilative liquid-resistant layer on a side of the micro-cavity-defining layer and completely covering openings on a side of the plurality of micro-pores. The ventilative liquid-resistant layer is configured to allow gas to pass therethrough and to block liquid from passing therethrough. The present disclosure also provides a method for manufacturing a detection chip and a sample introduction method for the detection chip.

Abstract: Methods and apparatuses for decoding a compressed image using a neural image compression network are provided. The method may include generating context parameters associated with a compressed image, the context parameters corresponding to a first area. The method may also include determining that a long range global dependency exists between a first latent and a second latent in a long-range global area within the compressed image and predicting a plurality of context features using a transformer-based long-range context prediction model. The method may then include reconstructing the compressed image based on the predicted plurality of context features.

Abstract: The present disclosure relates to a microfluidic chip. The microfluidic chip includes a first substrate, and the first substrate includes a sample input hole and a reaction region located downstream of the sample input hole. The reaction region includes at least one groove, an orthographic projection of each groove on the first substrate is an axisymmetric pattern, a width of the axisymmetric pattern in a first direction is not less than a width of the axisymmetric pattern in a second direction, and the first direction is perpendicular to the second direction.

Abstract: A high-throughput test chip includes: a backplane, a cover plate and a connector. The backplane and the cover plate are aligned to form a plurality of accommodation chambers. Test chip units are disposed on one side of the backplane facing the cover plate, and each of the test chip units is located in the corresponding accommodation chamber. Each of the accommodation chambers is provided with a liquid inlet and a liquid outlet. The connector includes pipelines; each of the pipelines is provided with a valve structure configured to control connection or disconnection of the pipeline. In each pair of a pipeline and an accommodation chamber, an inlet of the pipeline communicates with the liquid outlet of the accommodation chamber; the pipelines form at least one pipeline group, each pipeline group at least includes two pipelines, and the pipelines in each pipeline group share the same sample liquid outlet.

Abstract: The present disclosure provides a chip, a microfluidic device. The chip includes a first container for accommodating a first fluid, a second container for accommodating a second fluid, a delivery channel including a first flow channel communicating with the first container and a second flow channel communicating with the second container, the first flow channel and the second flow channel intersecting and communicating with each other at a junction, and at least one collector. The delivery channel allows the first and second fluids to meet at the junction to generate droplets. The first flow channel comprises a first, a second and a third sub-portions, the second flow channel comprises a first, a second and a third portions. An area of a first cross-section of the second sub-portion at the junction is greater than or equal to an area of a second cross-section of the second portion at the junction.

Abstract: A method of video decoding includes receiving a coded video bitstream comprising coded information of one or more coded pictures, the coded information includes an SEI message associated with at least a first picture in the one or more coded pictures, the SEI message includes at least a syntax element indicative of at least one of a forward truncation function for converting an original picture of a first bit depth to the first picture of a second bit depth and/or a reverse truncation function corresponding to the forward truncation function, the second bit depth is lower than the first bit depth. The method also includes reconstructing at least the first picture comprising first reconstructed samples based on the coded information, a numbering range of sample values of the first reconstructed samples is determined by at least one of the forward truncation function and/or the reverse truncation function.

Abstract: This disclosure relates generally to image coding and particularly to methods and systems for neural image compression (NIC). The disclosed NIC decoder/encoder may include various neural network components that are configured to achieve a balance between network complexity and coding efficiency. Such a NIC decoder/encoder implementation particularly include a core decoder and a hyper decoder each including a neural network architecture adapted for achieving a lightweight decoder/encoder.

Abstract: A method for constructing a periodically-poled nonlinear crystal may include implanting ions in a bulk crystal of strontium tetraborate (SBO) or lithium triborate (LBO) to generate a damaged layer at a predetermined depth, attaching a handle material to the surface of the bulk crystal, cleaving the bulk crystal at the damaged layer to generate a thin plate, and polishing the thin plate to a thickness suitable for quasi-phase-matching (QPM) to generate laser output light having wavelengths in the range of about 120-200 nm. The surfaces of thin plates generated in this way are optically contacted, and resulting stacks are diced and arranged to generate many-layered QPM crystals. Methods, inspection systems, lithography systems and cutting systems incorporating the laser assembly are also described.

Abstract: A high-throughput test chip includes: a backplane, a cover plate and a connector. The backplane and the cover plate are aligned to form a plurality of accommodation chambers. Test chip units are disposed on one side of the backplane facing the cover plate, and each of the test chip units is located in the corresponding accommodation chamber. Each of the accommodation chambers is provided with a liquid inlet and a liquid outlet. The connector includes pipelines; each of the pipelines is provided with a valve structure configured to control connection or disconnection of the pipeline. In each pair of a pipeline and an accommodation chamber, an inlet of the pipeline communicates with the liquid outlet of the accommodation chamber; the pipelines form at least one pipeline group, each pipeline group at least includes two pipelines, and the pipelines in each pipeline group share the same sample liquid outlet.

Abstract: Content-adaptive online training for end-to-end (E2E) neural image compression (NIC) using a neural network performed by at least one processor, is provided, including receiving an input image, to an E2E NIC framework, splitting the input image into a plurality of blocks, selecting a subset of blocks from the plurality of blocks, the subset of blocks sharing a same pattern, preprocessing a neural network of the E2E NIC framework, wherein the preprocessed neural network is applied to the selected subset of blocks, computing updated parameters using the preprocessed neural network, and generating an updated E2E NIC framework, based on the updated parameters.

Abstract: The present disclosure provides a chip, a microfluidic device including the chip, and a method for sorting target droplets. The chip includes a first container for accommodating a first fluid, a second container for accommodating a second fluid, a delivery channel including a first flow channel communicating with the first container and a second flow channel communicating with the second container, the first flow channel and the second flow channel intersecting and communicating with each other at a junction, and at least one collector. A portion of the first flow channel includes the junction and is divided into two sections by the junction, in each section, the section thickens gradually along a first direction away from the junction. The second flow channel includes the junction and is divided into two sections by the junction, in each section, the section thickens gradually along a second direction away from the junction.

Abstract: Processing circuitry performs, based on an input image and a guideline image resulting of an image based computer vision task on the input image, an online training of a compression domain computer vision task framework (CDCVTF). The CDCVTF includes an encoding portion and a decoding portion. The encoding portion compresses the input image into a compression domain, and the decoding portion performs the image based computer vision task in the compression domain. The online training determines at least an update to a neural network in the decoding portion that reduces a loss between a result of the image based computer vision task in the compression domain and the guideline image. The processing circuitry encodes the input image into an encoded image, and forms a bitstream that carries the encoded image and additional bits. The additional bits are indicative of the update to the neural network in the decoding portion.