Abstract: A control method includes obtaining sensing data output by an observation sensor of a movable platform when sensing a target object in an environment, determining a position of the target object based on the sensing data, and sending the position of the target object to another movable platform moving in the environment, or to a relay device for the relay device to send the position of the target object to the another movable platform.

Abstract: A method and apparatus for reducing artifacts in a compressed image using a neural-network based deblocking filter. The method may include receiving at least one reconstructed image, wherein each reconstructed image comprises one or more reconstructed blocks and extracting boundary areas associated with boundaries of the one or more reconstructed blocks in the at least one reconstructed image. The extracted boundary areas may be input in a trained deblocking model to generate boundary areas having reduced artifacts and the trained deblocking mode is trained on training data based on estimated compression by a neural image compression (NIC) network. The edge areas associated with the generated boundary areas may be removed; and at least one reconstructed image with reduced artifacts may be generated based on the generated boundary areas.

Abstract: Described are examples for detecting objects in an image on a device including setting, based on a condition, a number of sparse proposals to use in performing object detection in the image, performing object detection in the image based on providing the sparse proposals as input to an object detection process to infer object location and classification of one or more objects in the image, and indicating, to an application and based on an output of the object detection process, the object location and classification of the one or more objects.

Abstract: The present disclosure provides a microfluidic substrate and a microfluidic chip including the microfluidic substrate. The microfluidic substrate includes a plurality of microcavities arranged in an array, at least some of the plurality of microcavities are through holes, and a tangent plane at each of at least some points on a sidewall of each microcavity forms a non-perpendicular angle with a reference plane where the microfluidic substrate is located.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Abstract: The present invention relates to an auditing system for a built environment of an age-friendly street based on multisource big data. The auditing system includes: a data acquisition module is configured to acquire urban streetscape image data, urban road network data and urban point-of-interest data; a data classification auditing module is configured to acquire the data of the data acquisition module, classify the image data, and process the image data by using a data processing method to acquire evaluated numerical values of different types of indexes; a data summary analysis module is configured to acquire the evaluated numerical values of the data classification auditing module, calculate sub-item index numerical values of each output unit and calculate result data according to the sub-item index numerical values; a audit result output module is configured to acquire the result data of the data summary analysis module and visualize and output the result data.

Abstract: A gene detection substrate is provided, including: a substrate; a gene detection channel in the substrate, an opening of the gene detection channel is on one side of the substrate; the gene detection channel includes a sample injection groove, a sample outgoing groove and a flow channel groove sequentially connected and communicated with each other; the flow channel groove includes reaction holes and flow channel structures; the reaction holes are distributed at intervals, and any two adjacent reaction holes are communicated with each other through the flow channel structure; the flow channel structure includes a first, second, and third sub-grooves sequentially connected and communicated with each other; a width of each of the first and third sub-grooves in a first direction is smaller than that of the second sub-groove in the first direction; and the first direction is perpendicular to an arrangement direction of two adjacent reaction holes.

Abstract: A chip packaging structure and a chip packaging method, the structure including: a sample substrate with through holes; first and second cover plates on opposite sides of the sample substrate; and at least one pair of a sample inlet and a sample outlet, each pair of the sample inlet and the sample outlet is in one or both of the first cover plate and the second cover plate, a flow path is between each pair of the sample inlet and the sample outlet, a first flow channel structure is on a surface of the first cover plate opposite to the sample substrate, a second flow channel structure is on a surface of the second cover plate opposite to the sample substrate, and the first flow channel structure and the second flow channel structure are connected with the through holes, to form a continuous channel corresponding to the flow path.

Abstract: This disclosure relates generally to image coding and particularly to methods and systems for neural image compression (NIC). The disclosed NIC decoder/encoder may include various neural network components that are configured to achieve a balance between network complexity and coding efficiency. Such a NIC decoder/encoder implementation particularly include a core decoder and a hyper decoder each including a neural network architecture adapted for achieving a lightweight decoder/encoder.

Abstract: A seal structure for an in-wheel electric motor drive system. The seal structure is used for forming a seal between a first sealed portion (90s) of an output shaft and a second sealed portion (10s) of a housing. The seal structure (1) comprises a dustproof ring (11) and a seal assembly (12).

Abstract: The solar cell includes a silicon substrate, multiple first electrodes, and multiple second electrodes. The solar cell further includes a tunneling oxide layer, multiple doped polysilicon layers, and at least one barrier layer. The at least one barrier layer is arranged between every adjacent two doped polysilicon layers in the multiple doped polysilicon layers, and the multiple first electrodes are electrically connected to different doped polysilicon layers. The solar cell provided according to the present application can reduce the total thickness of the polycrystalline silicon layer, so that a thinner polycrystalline silicon layer can reduce parasitic absorption, thereby increasing short-circuit current. Moreover, the risk of slurry burning through the tunneling oxide layer is reduced by the barrier layer, while reducing metal recombination, which increases the open circuit voltage of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

Abstract: The present disclosure provides a compound. The compound is a compound shown in formula (1) or a stereoisomer, a tautomer, a nitrogen oxide, a solvate, a metabolite, a pharmaceutically acceptable salt, or a prodrug of the compound shown in formula (1). The compound shown in formula (1) can significantly inhibit Mpro or inhibit coronavirus replication, and has excellent metabolic stability.

Abstract: A method and apparatus comprising computer code configured to cause a processor or processors to receive a video bitstream comprising a current block in a current picture and reconstruct the current block by transforming the current block by a neural network comprising a plurality of upsample modules and activation modules, and at least one of the activation modules includes a LeakyReLu function and a convolution function.

Abstract: A method and apparatus comprising computer code configured to cause a processor or processors to receive a video bitstream comprising a current block in a current picture and reconstruct the current block by transforming the current block by a neural network comprising a plurality of upsample modules and activation modules, and at least one of the upsample modules includes a convolution layer and a pixel shuffle layer, and at least one of the activation modules includes a LeakyReLu function and a convolution function.

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Abstract: Provided are a microfluidic chip and a usage method thereof, and a microfluidic system. The microfluidic chip includes a substrate layer, the substrate layer includes a substrate and a drive electrode layer; and a cover plate layer arranged opposite the substrate layer, a space between the cover plate layer and the substrate layer form a solution accommodating space; the cover plate layer includes a solution inlet hole, a solution outlet hole, and limiting recesses arranged on a side of the cover plate layer facing the substrate layer, the solution inlet hole, the solution outlet hole and each limiting recess are in communication with the solution accommodating space, and an end surface of the solution inlet hole adjacent to the substrate layer, an end surface of the solution outlet hole adjacent to the substrate layer, and opening surfaces of the plurality of limiting recesses are arranged substantially flush with one another.

Abstract: A centrifugal structure member of a microfluidic chip and a centrifuge are provided. The centrifugal structure member of a microfluidic chip includes: a connecting portion (10) configured to connect to a rotor of a centrifuge; a support portion (20) fixedly connected or integrally formed with the connecting portion (10), and having an inclined outer surface forming an included angle with the rotation axis (50) of the rotor of the centrifuge; and a mounting portion (30) connected with or formed on the inclined outer surface, and configured to detachably mount the microfluidic chip (40) on the support portion (20).

Abstract: Aspects of the disclosure provide methods and apparatuses, for video decoding and encoding. The apparatus includes processing circuitry configured to receive an image/video comprising one or more blocks and metadata for a machine task associated with the image/video. The metadata specifies neural network post-filtering characteristics for machine consumption. The processing circuitry decodes a first post-filtering parameter in the image/video corresponding to the one or more blocks to be reconstructed. The first post-filtering parameter applies to a block in the one or more blocks and has been updated by a post-filtering module in a post-filtering neural network (NN) that is trained based on a training dataset and the metadata. The processing circuitry determines the post-filtering NN in a video decoder corresponding to the one or more blocks based on the first post-filtering parameter, and decodes the block based on the determined post-filtering NN corresponding to the block and the metadata.