Abstract: A laser driving apparatus includes a driver, a tracking circuit, a comparator and a control circuit. The driver includes a laser driving circuit, and the tracking circuit includes a reference current source and a replica circuit. The laser driving circuit generates a driving current to drive a laser. The reference current source generates a reference current as a reference for the laser driving apparatus. The replica circuit corresponds to at least a portion of the laser driving circuit, generates a sensing current according to the reference current and track the driving current. The comparator compares voltages respectively on the laser driving circuit and the replica circuit to generate a comparison signal. The control circuit adjusts the sensing current or the driving current according to the comparison signal. The laser driving apparatus can include multiple channels with multiple drivers.

Abstract: A laser driving apparatus includes a driver, a tracking circuit, a comparator and a control circuit. The driver includes a laser driving circuit, and the tracking circuit includes a reference current source and a replica circuit. The laser driving circuit generates a driving current to drive a laser. The reference current source generates a reference current as a reference for the laser driving apparatus. The replica circuit corresponds to at least a portion of the laser driving circuit, generates a sensing current according to the reference current and track the driving current. The comparator compares voltages respectively on the laser driving circuit and the replica circuit to generate a comparison signal. The control circuit adjusts the sensing current or the driving current according to the comparison signal. The laser driving apparatus can include multiple channels with multiple drivers.

Abstract: A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for selectively providing a voltage source to one of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the voltage source substantially intact when the voltage source is coupled to one of the first pin and the second pin.

Abstract: A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for selectively providing a voltage source to one of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the voltage source substantially intact when the voltage source is coupled to one of the first pin and the second pin.

Abstract: A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for providing a voltage source having a predetermined voltage to one of the first pin and the second pin and for providing a current source having a predetermined current to the other of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the predetermined voltage and the predetermined current substantially intact when an external charger charges a battery device of the universal serial bus device.

Abstract: A phase-locked loop circuit, including: an operating circuit for detecting a difference between a reference signal and a feedback oscillating signal to generate a detected result, and generating a first control signal according to the detected result, an auxiliary circuit for generating a second control signal that is asynchronous with the first control signal, and a controllable oscillator coupled to the operating circuit and the auxiliary circuit for generating an output oscillating signal according to the first control signal and the second control signal, wherein the feedback oscillating signal is derived from the output oscillating signal.

Abstract: A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for selectively providing a voltage source to one of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the voltage source substantially intact when the voltage source is coupled to one of the first pin and the second pin.

Abstract: A phase-locked loop circuit, including: an operating circuit for detecting a difference between a reference signal and a feedback oscillating signal to generate a detected result, and generating a first control signal according to the detected result, an auxiliary circuit for generating a second control signal that is asynchronous with the first control signal, and a controllable oscillator coupled to the operating circuit and the auxiliary circuit for generating an output oscillating signal according to the first control signal and the second control signal, wherein the feedback oscillating signal is derived from the output oscillating signal.

Abstract: A spread spectrum clock generator includes: a phase frequency detector, for generating a phase difference signal according to a frequency divided signal and a reference signal with a reference frequency; a charge pump, for receiving the phase difference signal and generating an output current according to the phase difference signal; a loop filter, for receiving the output current and converting the output current to a voltage-controlled signal; a voltage-controlled oscillator, for receiving the voltage-controlled signal and generating a plurality of voltage-controlled output signals, wherein the plurality of voltage-controlled signals have a specific phase difference and a same voltage-controlled frequency; a frequency dividing unit, for receiving the plurality of voltage-controlled output signal and generating the frequency divided signal; and a delta-sigma modulator, for controlling the frequency dividing unit to have an equivalent divided value of (N+b)S+(N?a)(P?S) through receiving the frequency divided

Abstract: A spread spectrum clock generator includes: a phase frequency detector, for generating a phase difference signal according to a frequency divided signal and a reference signal with a reference frequency; a charge pump, for receiving the phase difference signal and generating an output current according to the phase difference signal; a loop filter, for receiving the output current and converting the output current to a voltage-controlled signal; a voltage-controlled oscillator, for receiving the voltage-controlled signal and generating a plurality of voltage-controlled output signals, wherein the plurality of voltage-controlled signals have a specific phase difference and a same voltage-controlled frequency; a frequency dividing unit, for receiving the plurality of voltage-controlled output signal and generating the frequency divided signal; and a delta-sigma modulator, for controlling the frequency dividing unit to have an equivalent divided value of (N+b)S+(N?a)(P?S) through receiving the frequency divided